III-V Optoelectronics and Semiconductor Process Technology

A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "D1: Semiconductor Devices".

Deadline for manuscript submissions: 31 July 2024 | Viewed by 7574

Special Issue Editors

Dr. Hsin-Chu Chen
E-Mail Website
Guest Editor
Institute of Advanced Semiconductor Packaging and Testing, College of Semiconductor and Advanced Technology Research, National Sun Yat-Sen University, Kaohsiung 804201, Taiwan
Interests: III-V optoelectronics and semiconductor process technology; GaN-based optoelectronics devices; oxide semiconductor thin-film transistors
Prof. Dr. Hao-Chung Kuo
E-Mail Website
Guest Editor
Prof. Dr. Yi-Jen Chiu
E-Mail Website
Guest Editor
Department of Photonics, National Sun Yat-Sen University, Kaohsiung, Taiwan
Interests: Si photonics; semiconductor laser; semiconductor optical modulator; hybrid photonic integraton

Special Issue Information

Dear Colleagues,

Wide-bandgap III-V semiconductor materials possess exceptional electrical and optical properties, making them highly promising candidates for a wide range of high-frequency, high-power, and optoelectronic devices. Researchers have extensively explored these materials for high-frequency RF amplifiers, high-power electronics, and CMOS transistors, due to their superior electron mobility and high breakdown voltage. In addition, their excellent optical properties, including high quantum efficiency and direct bandgap, have made them attractive for various optoelectronic applications, such as light-emitting diodes (LEDs), lasers, sensors, and photovoltaic cells.

The Special Issue "III-V Optoelectronics and Semiconductor Process Technology" in the Journal Micromachines invites high-quality contributions from both academia and industry. The topics covered include the epitaxial growth and fabrication of III-V semiconductors, device design and characterization, novel device concepts, and process technology for III-V-based devices. The Special Issue also covers the use of III-V materials in various applications, such as LEDs, lasers, photovoltaic cells, and sensors.

We look forward to receiving your submissions to this Special Issue.

Dr. Hsin-Chu Chen
Prof. Dr. Hao-Chung Kuo
Prof. Dr. Yi-Jen Chiu
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Micromachines is an international peer-reviewed open access monthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2600 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • III-V semiconductor epitaxial growth and fabrication
  • optoelectronics and semiconductor devices
  • integration process technology
  • III-V materials applications

Published Papers (7 papers)

Order results
Result details
Select all
Export citation of selected articles as:

Research

Jump to: Review

12 pages, 1637 KiB  
Article
Analysis of Nanowire pn-Junction with Combined Current–Voltage, Electron-Beam-Induced Current, Cathodoluminescence, and Electron Holography Characterization
Micromachines 2024, 15(1), 157; https://doi.org/10.3390/mi15010157 - 20 Jan 2024
Viewed by 748
Abstract
We present the characterization of a pn-junction GaAs nanowire. For the characterization, current–voltage, electron-beam-induced current, cathodoluminescence, and electron holography measurements are used. We show that by combining information from these four methods, in combination with drift-diffusion modelling, we obtain a detailed picture of [...] Read more.
We present the characterization of a pn-junction GaAs nanowire. For the characterization, current–voltage, electron-beam-induced current, cathodoluminescence, and electron holography measurements are used. We show that by combining information from these four methods, in combination with drift-diffusion modelling, we obtain a detailed picture of how the nanowire pn-junction is configured and how the recombination lifetime varies axially in the nanowire. We find (i) a constant doping concentration and 600 ps recombination lifetime in the n segment at the top part of the nanowire; (ii) a 200–300 nm long gradient in the p doping next to the pn-junction; and (iii) a strong gradient in the recombination lifetime on the p side, with 600 ps lifetime at the pn-junction, which drops to 10 ps at the bottom of the p segment closest to the substrate. We recommend such complementary characterization with multiple methods for nanowire-based optoelectronic devices. Full article
(This article belongs to the Special Issue III-V Optoelectronics and Semiconductor Process Technology)
Show Figures

Figure 1

12 pages, 4378 KiB  
Article
Improvement of AlGaN/GaN High-Electron-Mobility Transistor Radio Frequency Performance Using Ohmic Etching Patterns for Ka-Band Applications
Micromachines 2024, 15(1), 81; https://doi.org/10.3390/mi15010081 - 30 Dec 2023
Viewed by 725
Abstract
In this paper, AlGaN/GaN high-electron-mobility transistors (HEMTs) with ohmic etching patterns (OEPs) “fabricated to improve device radio frequency (RF) performance for Ka-band applications” are reported. The fabricated AlGaN/GaN HEMTs with OEP structures were used to reduce the source and drain resistances (R [...] Read more.
In this paper, AlGaN/GaN high-electron-mobility transistors (HEMTs) with ohmic etching patterns (OEPs) “fabricated to improve device radio frequency (RF) performance for Ka-band applications” are reported. The fabricated AlGaN/GaN HEMTs with OEP structures were used to reduce the source and drain resistances (Rs and Rd) for RF performance improvements. Within the proposed study using 1 μm hole, 3 μm hole, 1 μm line, and 3 μm line OEP HEMTs with 2 × 25 μm gate widths, the small signal performance, large signal performance, and minimum noise figure (NFmin) with optimized values were measured for 1 μm line OEP HEMTs. The cut-off frequency (fT) and maximum oscillation frequency (fmax) value of the 1 μm line OEP device exhibited optimized values of 36.4 GHz and 158.29 GHz, respectively. The load–pull results show that the 1 μm line OEP HEMTs exhibited an optimized maximum output power density (Pout, max) of 1.94 W/mm at 28 GHz. The 1 μm line OEP HEMTs also exhibited an optimized NFmin of 1.75 dB at 28 GHz. The increase in the contact area between the ohmic metal and the AlGaN barrier layer was used to reduce the contact resistance of the OEP HEMTs, and the results show that the 1 μm line OEP HEMT could be fabricated, producing the best improvement in RF performance for Ka-band applications. Full article
(This article belongs to the Special Issue III-V Optoelectronics and Semiconductor Process Technology)
Show Figures

Figure 1

16 pages, 3663 KiB  
Article
Micro-Raman for Local Strain Evaluation of GaN LEDs and Si Chips Assembled on Cu Substrates
Micromachines 2024, 15(1), 25; https://doi.org/10.3390/mi15010025 - 22 Dec 2023
Viewed by 477
Abstract
Integrated circuits are created by interfacing different materials, semiconductors, and metals, which are appropriately deposited or grown on substrates and layers soldered together. Therefore, the characteristics of starting materials and process temperatures are of great importance, as they can induce residual strains in [...] Read more.
Integrated circuits are created by interfacing different materials, semiconductors, and metals, which are appropriately deposited or grown on substrates and layers soldered together. Therefore, the characteristics of starting materials and process temperatures are of great importance, as they can induce residual strains in the final assembly. Identifying and quantifying strain becomes strategically important in optimizing processes to enhance the performance, duration, and reliability of final devices. This work analyzes the thermomechanical local strain of semiconductor materials used to realize LED modules for lighting applications. Gallium Nitride active layers grown on sapphire substrates and Si chips are assembled by soldering with eutectic AuSn on copper substrates and investigated by Raman spectroscopy in a temperature range of −50 to 180 °C. From the Raman mapping of many different samples, it is concluded that one of the leading causes of strain in the GaN layer can be attributed to the differences in the thermal expansion coefficient among the various materials and, above all, among the chip, interconnection material, and substrate. These differences are responsible for forces that slightly bend the chip, causing strain in the GaN layer, which is most compressed in the central region of the chip and slightly stretched in the outer areas. Full article
(This article belongs to the Special Issue III-V Optoelectronics and Semiconductor Process Technology)
Show Figures

Figure 1

11 pages, 3793 KiB  
Article
An Accurate Electro-Thermal Coupling Model of a GaAs HBT Device under Floating Heat Source Disturbances
Micromachines 2023, 14(12), 2236; https://doi.org/10.3390/mi14122236 - 13 Dec 2023
Viewed by 520
Abstract
Taking into consideration the inaccurate temperature predictions in traditional thermal models of power devices, we undertook a study on the temperature rise characteristics of heterojunction bipolar transistors (HBTs) with a two-dimensional cross-sectional structure including a sub-collector region. We developed a current-adjusted polynomial electro-thermal [...] Read more.
Taking into consideration the inaccurate temperature predictions in traditional thermal models of power devices, we undertook a study on the temperature rise characteristics of heterojunction bipolar transistors (HBTs) with a two-dimensional cross-sectional structure including a sub-collector region. We developed a current-adjusted polynomial electro-thermal coupling model based on investigating floating heat sources. This model was developed using precise simulation data acquired from SILVACO (Santa Clara, CA, USA). Additionally, we utilized COMSOL software (version 5.6) to simulate the temperature distribution within parallel power cells, examining further impacts resulting from thermal coupling. The research findings indicate that the rise in current induces modifications in the local carrier concentration, thereby prompting variations in the local electric field, including changes in the heat source’s peak location and intensity. The device’s peak temperature exhibits a non-linear trend regulated by the current, revealing an error margin of less than 1.5% in the proposed current-corrected model. At higher current levels, the drift of the heat source leads to an increase in the heat dissipation path and reduces the coupling strength between parallel devices. Experiments were performed on 64 GaAs (gallium arsenide) HBT-based power cells using a QFI infrared imaging system. Compared to the traditional temperature calculation model, the proposed model increased the accuracy by 6.84%, allowing for more precise predictions of transistor peak temperatures in high-power applications. Full article
(This article belongs to the Special Issue III-V Optoelectronics and Semiconductor Process Technology)
Show Figures

Figure 1

13 pages, 4876 KiB  
Article
Polarization Engineered p-Type Electron Blocking Layer Free AlGaN Based UV-LED Using Quantum Barriers with Heart-Shaped Graded Al Composition for Enhanced Luminescence
Micromachines 2023, 14(10), 1926; https://doi.org/10.3390/mi14101926 - 13 Oct 2023
Viewed by 1115
Abstract
In this paper, in order to address the problem of electron leakage in AlGaN ultra-violet light-emitting diodes, we have proposed an electron-blocking free layer AlGaN ultra-violet (UV) light-emitting diode (LED) using polarization-engineered heart-shaped AlGaN quantum barriers (QB) instead of conventional barriers. This novel [...] Read more.
In this paper, in order to address the problem of electron leakage in AlGaN ultra-violet light-emitting diodes, we have proposed an electron-blocking free layer AlGaN ultra-violet (UV) light-emitting diode (LED) using polarization-engineered heart-shaped AlGaN quantum barriers (QB) instead of conventional barriers. This novel structure has decreased the downward band bending at the interconnection between the consecutive quantum barriers and also flattened the electrostatic field. The parameters used during simulation are extracted from the referred experimental data of conventional UV LED. Using the Silvaco Atlas TCAD tool; version 8.18.1.R, we have compared and optimized the optical as well as electrical characteristics of three varying LED structures. Enhancements in electroluminescence at 275 nm (52.7%), optical output power (50.4%), and efficiency (61.3%) are recorded for an EBL-free AlGaN UV LED with heart-shaped Al composition in the barriers. These improvements are attributed to the minimized non-radiative recombination on the surfaces, due to the progressively increasing effective conduction band barrier height, which subsequently enhances the carrier confinement. Hence, the proposed EBL-free AlGaN LED is the potential solution to enhance optical power and produce highly efficient UV emitters. Full article
(This article belongs to the Special Issue III-V Optoelectronics and Semiconductor Process Technology)
Show Figures

Figure 1

11 pages, 1308 KiB  
Article
Improving Performance and Breakdown Voltage in Normally-Off GaN Recessed Gate MIS-HEMTs Using Atomic Layer Etching and Gate Field Plate for High-Power Device Applications
Micromachines 2023, 14(8), 1582; https://doi.org/10.3390/mi14081582 - 11 Aug 2023
Viewed by 1282
Abstract
A typical method for normally-off operation, the metal–insulator–semiconductor-high electron mobility transistor (MIS-HEMT) has been investigated. Among various approaches, gate recessed MIS-HEMT have demonstrated a high gate voltage sweep and low leakage current characteristics. Despite their high performance, obtaining low-damage techniques in gate recess [...] Read more.
A typical method for normally-off operation, the metal–insulator–semiconductor-high electron mobility transistor (MIS-HEMT) has been investigated. Among various approaches, gate recessed MIS-HEMT have demonstrated a high gate voltage sweep and low leakage current characteristics. Despite their high performance, obtaining low-damage techniques in gate recess processing has so far proven too challenging. In this letter, we demonstrate a high current density and high breakdown down voltage of a MIS-HEMT with a recessed gate by the low damage gate recessed etching of atomic layer etching (ALE) technology. After the remaining 3.7 nm of the AlGaN recessed gate was formed, the surface roughness (Ra of 0.40 nm) was almost the same as the surface without ALE (no etching) as measured by atomic force microscopy (AFM). Furthermore, the devices demonstrate state-of-the-art characteristics with a competitive maximum drain current of 608 mA/mm at a VG of 6 V and a threshold voltage of +2.0 V. The devices also show an on/off current ratio of 109 and an off-state hard breakdown voltage of 1190 V. The low damage of ALE technology was introduced into the MIS-HEMT with the recessed gate, which effectively reduced trapping states at the interface to obtain the low on-resistance (Ron) of 6.8 Ω·mm and high breakdown voltage performance. Full article
(This article belongs to the Special Issue III-V Optoelectronics and Semiconductor Process Technology)
Show Figures

Figure 1

Review

Jump to: Research

21 pages, 3906 KiB  
Review
Vertical GaN MOSFET Power Devices
Micromachines 2023, 14(10), 1937; https://doi.org/10.3390/mi14101937 - 16 Oct 2023
Cited by 1 | Viewed by 2016
Abstract
Gallium nitride (GaN) possesses remarkable characteristics such as a wide bandgap, high critical electric field, robust antiradiation properties, and a high saturation velocity for high-power devices. These attributes position GaN as a pivotal material for the development of power devices. Among the various [...] Read more.
Gallium nitride (GaN) possesses remarkable characteristics such as a wide bandgap, high critical electric field, robust antiradiation properties, and a high saturation velocity for high-power devices. These attributes position GaN as a pivotal material for the development of power devices. Among the various GaN-based devices, vertical GaN MOSFETs stand out for their numerous advantages over their silicon MOSFET counterparts. These advantages encompass high-power device applications. This review provides a concise overview of their significance and explores their distinctive architectures. Additionally, it delves into the advantages of vertical GaN MOSFETs and highlights their recent advancements. In conclusion, the review addresses methods to enhance the breakdown voltage of vertical GaN devices. This comprehensive perspective underscores the pivotal role of vertical GaN MOSFETs in the realm of power electronics and their continual progress. Full article
(This article belongs to the Special Issue III-V Optoelectronics and Semiconductor Process Technology)
Show Figures

Figure 1

Back to TopTop