Recent Advances in CMOS Devices

A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "D1: Semiconductor Devices".

Deadline for manuscript submissions: closed (30 June 2023) | Viewed by 2752

Special Issue Editor


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Guest Editor
Key Laboratory for Wide Band Gap Semiconductor Materials and Devices of Education Ministry, School of Microelectronics, Xidian University, Xi’an 710071, China
Interests: Semiconductor device physics and Microelectronic reliability

Special Issue Information

Dear Colleagues,

With the development of information society, semiconductor technologies are becoming increasingly important, and electronic systems are rising in value. Advanced CMOS technologies will be key to increasing system performance in the future, so to meet market requirements, scientist are continuously developing leading edge CMOS technologies and supplying them to captive systems and outside consumers. This Special Issue on advanced CMOS devices aims to highlight the current status of CMOS research and development for future generations of CMOS devices, and to present research that meets market requirements by developing leading-edge CMOS technologies and applying them to internal systems. We are particularly interested in simulations and experimental testing, which are increasingly important in the development of new technologies.

We look forward to receiving your submissions.

 

Prof. Dr. Hongxia Liu
Guest Editor

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Micromachines is an international peer-reviewed open access monthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2600 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Prof. Dr. Hongxia Liu
Guest Editor

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Micromachines is an international peer-reviewed open access monthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2600 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • advanced CMOS devices
  • CMOS devices performance
  • structure design
  • CMOS gate length
  • surface and interface

Published Papers (2 papers)

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Research

13 pages, 5736 KiB  
Article
A Buried Thermal Rail (BTR) Technology to Improve Electrothermal Characteristics of Complementary Field-Effect Transistor (CFET)
by Zhecheng Pan, Tao Liu, Jingwen Yang, Kun Chen, Saisheng Xu, Chunlei Wu, Min Xu and David Wei Zhang
Micromachines 2023, 14(9), 1751; https://doi.org/10.3390/mi14091751 - 07 Sep 2023
Viewed by 1374
Abstract
The complementary field-effect transistor (CFET) with N-type FET (NFET) stacked on P-type FET (PFET) is a promising device structure based on gate-all-around FET (GAAFET). Because of the high-density stacked structure, the self-heating effect (SHE) becomes more and more severe. Buried thermal rail (BTR) [...] Read more.
The complementary field-effect transistor (CFET) with N-type FET (NFET) stacked on P-type FET (PFET) is a promising device structure based on gate-all-around FET (GAAFET). Because of the high-density stacked structure, the self-heating effect (SHE) becomes more and more severe. Buried thermal rail (BTR) technology on top of the buried power rail (BPR) process is proposed to improve heat dissipation. Through a systematical 3D Technology Computer Aided Design (TCAD) simulation, compared to traditional CFET and CFET with BPR only, the thermal resistance (Rth) of CFET can be significantly reduced with BTR technology, while the drive capability is also improved. Furthermore, based on the proposed BTR technology, different power delivery structures of top-VDD–top-VSS (TDTS), bottom-VDD–bottom-VSS (BDBS), and bottom-VDD–top-VSS (BDTS) were investigated in terms of electrothermal and parasitic characteristics. The Rth of the BTR-BDTS structure is decreased by 5% for NFET and 9% for PFET, and the Ion is increased by 2% for NFET and 7% for PFET. Full article
(This article belongs to the Special Issue Recent Advances in CMOS Devices)
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12 pages, 4506 KiB  
Article
GaN/Si Heterojunction VDMOS with High Breakdown Voltage and Low Specific On-Resistance
by Xin Yang, Baoxing Duan and Yintang Yang
Micromachines 2023, 14(6), 1166; https://doi.org/10.3390/mi14061166 - 31 May 2023
Cited by 1 | Viewed by 985
Abstract
A novel VDMOS with the GaN/Si heterojunction (GaN/Si VDMOS) is proposed in this letter to optimize the breakdown voltage (BV) and the specific on-resistance (Ron,sp) by Breakdown Point Transfer (BPT), which transfers the breakdown point from the high-electric-field [...] Read more.
A novel VDMOS with the GaN/Si heterojunction (GaN/Si VDMOS) is proposed in this letter to optimize the breakdown voltage (BV) and the specific on-resistance (Ron,sp) by Breakdown Point Transfer (BPT), which transfers the breakdown point from the high-electric-field region to the low-electric-field region and improves the BV compared with conventional Si VDMOS. The results of the TCAD simulation show that the optimized BV of the proposed GaN/Si VDMOS increases from 374 V to 2029 V compared with the conventional Si VDMOS with the same drift region length of 20 μm, and the Ron,sp of 17.2 mΩ·cm2 is lower than 36.5 mΩ·cm2 for the conventional Si VDMOS. Due to the introduction of the GaN/Si heterojunction, the breakdown point is transferred by BPT from the higher-electric-field region with the largest radius of curvature to the low-electric-field region. The interfacial state effects of the GaN/Si are analyzed to guide the fabrication of the GaN/Si heterojunction MOSFETs. Full article
(This article belongs to the Special Issue Recent Advances in CMOS Devices)
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