Hardware Intrinsic Security for Trusted Electronic Systems

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Computer Science & Engineering".

Deadline for manuscript submissions: closed (31 January 2022) | Viewed by 6888

Special Issue Editors


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Guest Editor
School of Information Security and Applied Computing, College of Engineering & Technology, Eastern Michigan University, Ypsilanti, MI 48197, USA
Interests: microelectronics/hardware assisted security; emerging IoT and connected autonomous systems security; security and privacy of smart building and spaces in modern smart cities environment; trusted next generations smart power grid networks
Special Issues, Collections and Topics in MDPI journals

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Guest Editor
School of Engineering & Technology, Central Michigan University, Mt Pleasant, MI 48859, USA
Interests: Wireless Sensor Network (WSN); Internet of Things (IoT); Structural Health Monitoring (SHM); data fusion techniques for WSN; low power embedded system; video processing; digital signal processing; robotics; RFID; localization; VLSI; FPGA design
Special Issues, Collections and Topics in MDPI journals

E-Mail Website
Guest Editor
School of Information Security and Applied Computing, College of Engineering & Technology, Eastern Michigan University, Ypsilanti, MI 48197, USA
Interests: network security; computational intelligence

Special Issue Information

Dear Colleagues,

Hardware-intrinsic security takes advantage of the intrinsic behavior of semiconductor integrated circuits (ICs) to protect the hardware/software applications against new cyberattacks. Research in hardware intrinsic security and assurance (HISA) has recently gained momentum as it provides a unique layer of trust and authentication for emerging smart and life-critical applications. These applications include smart buildings and spaces, intelligent transportation and connected autonomous systems, advanced metering infrastructure to improve reliability, safety, sustainability, and power delivery in smart cities, implantable medical devices that diagnose, monitor, and treat a wide range of medical conditions to improve our lifestyles, smart sensors and embedded hardware for connected IoT devices. The recently exposed chip vulnerabilities, i.e. Spectre and Meltdown, are striking evidence that hardware intrinsic security is essential to enable trust in the manufactured hardware and chip design. For that, semiconductor integrated circuits (ICs) and embedded devices are designed, fabricated, and assembled at varies locations across the globe, involving multiple parties, making them venerable to new cyber and physical system attacks. The rapid devolvement of such critical security challenges in the modern supply chain security challenge urges the need for a non-conventional and robust countermeasure against such modern cyberattacks.

This special issue of MDPI: Electronics focused on hardware intrinsic security and its applications for electronics systems, particularly in constructing imminent computing systems against these emerging attacks without significantly degrading system performance. This includes new hardware security issues that have grown significantly over the past decade with an array of new physical and embedded systems attacks and countermeasures like malicious modifications of integrated circuits, also referred to as hardware Trojan and fault injection physical attacks, trusted manufacturing and smart contracts; split manufacturing; reverse engineering that is followed by hardware tampering and cloning, design overbuilding, hardware obfuscation; and other supply chain risks including consumer electronics counterfeits. This may also include outstanding papers on various topics related to hardware security: hardware security primitives (PUFs and TRNGs), trusted and secure IoT design, hardware Trojan detection, countermeasures against power analysis and side-channel attacks, efficient and reliable low power hardware security techniques, Blockchain and AI approaches for hardware-based security.


Dr. Fathi Amsaad
Dr. Ahmed Abdelgawad
Prof. Sean (Xiangdong) Che
Guest Editors

Manuscript Submission Information

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Keywords

  • Hardware Trojan attacks and detection techniques
  • Hardware-based security primitives (PUFs, RNGs)
  • Security, privacy, and trust protocols
  • Side-channel attacks and protection
  • Metrics, policies, and standards related to hardware security
  • Security of biomedical systems, e-health, and medicine
  • Secure system-on-chip (SoC) architecture
  • Hardware IP trust (watermarking, metering, trust verification)
  • Trusted manufacturing including split manufacturing and 3D ICs
  • Security analysis and protection of Internet of Things (IoT)
  • Secure and efficient implementation of crypto algorithms
  • Reverse engineering and hardware obfuscation
  • Supply chain risks mitigation including counterfeit detection & avoidance
  • Hardware tampering attacks and protection
  • Hardware techniques that ensure software and/or system security

Published Papers (2 papers)

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Research

17 pages, 1104 KiB  
Article
Strong PUF Enrollment with Machine Learning: A Methodical Approach
by Amir Ali-Pour, David Hely, Vincent Beroulle and Giorgio Di Natale
Electronics 2022, 11(4), 653; https://doi.org/10.3390/electronics11040653 - 19 Feb 2022
Cited by 3 | Viewed by 2453
Abstract
Physically Unclonable Functions (PUFs) have become ubiquitous as part of the emerging cryptographic algorithms. Strong PUFs are also predominantly addressed as the suitable variant for lightweight device authentication and strong single-use key generation protocols. This variant of PUF can produce a very large [...] Read more.
Physically Unclonable Functions (PUFs) have become ubiquitous as part of the emerging cryptographic algorithms. Strong PUFs are also predominantly addressed as the suitable variant for lightweight device authentication and strong single-use key generation protocols. This variant of PUF can produce a very large number of device-specific unique identifiers (CRPs). Consequently, it is infeasible to store the entire CRP space of a strong PUF into a database. However, it is potential to use Machine Learning to provide an estimated model of strong PUF for enrollment. An estimated model of PUF is a compact solution for the designer’s community, which can provide access to the full CRP space of the PUF with some probability of erroneous behavior. To use this solution for enrollment, it is crucial on one hand to ensure that PUF is safe against a model-building attack. On the other hand, it is important to ensure that the ML-based enrollment will be performed efficiently. In this work, we discuss these factors, and we present a formalized procedure of ML-based modeling of PUF for enrollment. We first define a secure sketch which allows modelability of PUF only for a trusted party. We then highlight important parameters which constitute the cost of enrollment. We show how an ML-based enrollment procedure should use these parameters to evaluate the enrollment cost prior to enrolling a large group of PUF-enabled devices. We introduce several parameters as well to control ML-based modeling in favor of PUF enrollment with minimum cost. Our proposed ML-based enrollment procedure can be considered a starting point to develop enrollment solutions for protocols which use an estimated model of PUF instead of a CRP database. In the end, we present a use-case of our ML-based enrollment method to enroll 100 instances of 2-XOR Arbiter PUFs and discuss the evaluative outcomes. Full article
(This article belongs to the Special Issue Hardware Intrinsic Security for Trusted Electronic Systems)
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17 pages, 4989 KiB  
Article
A Configurable RO-PUF for Securing Embedded Systems Implemented on Programmable Devices
by Macarena C. Martínez-Rodríguez, Eros Camacho-Ruiz, Piedad Brox and Santiago Sánchez-Solano
Electronics 2021, 10(16), 1957; https://doi.org/10.3390/electronics10161957 - 14 Aug 2021
Cited by 6 | Viewed by 2980
Abstract
Improving the security of electronic devices that support innovative critical services (digital administrative services, e-health, e-shopping, and on-line banking) is essential to lay the foundations of a secure digital society. Security schemes based on Physical Unclonable Functions (PUFs) take advantage of intrinsic characteristics [...] Read more.
Improving the security of electronic devices that support innovative critical services (digital administrative services, e-health, e-shopping, and on-line banking) is essential to lay the foundations of a secure digital society. Security schemes based on Physical Unclonable Functions (PUFs) take advantage of intrinsic characteristics of the hardware for the online generation of unique digital identifiers and cryptographic keys that allow to ensure the protection of the devices against counterfeiting and to preserve data privacy. This paper tackles the design of a configurable Ring Oscillator (RO) PUF that encompasses several strategies to provide an efficient solution in terms of area, timing response, and performance. RO-PUF implementation on programmable logic devices is conceived to minimize the use of available resources, while operating speed can be optimized by properly selecting the size of the elements used to obtain the PUF response. The work also describes the interface added to the PUF to facilitate its incorporation as hardware Intellectual Property (IP)-modules into embedded systems. The performance of the RO-PUF is proven with an extensive battery of tests, which are executed to analyze the influence of different test strategies on the PUF quality indexes. The configurability of the proposed RO-PUF allows establishing the most suitable “cost/performance/security-level” trade-off for a certain application. Full article
(This article belongs to the Special Issue Hardware Intrinsic Security for Trusted Electronic Systems)
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