Dependability of Emerging Computing Paradigms and Technologies in IoT-Oriented Circuits, Architectures and Algorithms

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Computer Science & Engineering".

Deadline for manuscript submissions: closed (30 September 2023) | Viewed by 19400

Special Issue Editors


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Guest Editor
Lyon Institute of Nanotechnology, École Centrale de Lyon, Écully, France
Interests: approximate computing; reliability; deep learning; hardware architectures; fault-tolerant design; hardware testing; in-memory computing; digital design

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Guest Editor
TIMA laboratory, CNRS, Université Grenoble Alpes, Grenoble, France
Interests: emerging memory technologies; architectures for emerging computing paradigms; characterization of fabrication-induced process variability; fault modeling; defect characterization; design for reliability; design for testing; design for security

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Guest Editor
INRIA Rennes Research Center, University of Rennes 1 and IRISA, 35000 Rennes, France
Interests: embedded systems; real-time systems; mixed–critical systems; design space exploration; fault tolerance; scheduling/mapping techniques; software/hardware co-design; low power design; wireless sensor networks
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Special Issue Information

Dear Colleagues,

In recent decades, the incessant growing presence of smart applications in our daily lives has pushed the frenetic development of new devices which constitute the Internet of Things infrastructure (IoT). The undeniable need for energy efficiency in these devices is leading to the adoption of innovative computing paradigms—such as approximate computing, computation-in-memory, and neuromorphic computing—and emerging technologies—such as new nonvolatile memories (RRAM, MRAM, FeRAM, etc.). As we are heading toward a future where the ubiquitous presence of these devices will simplify and guide our daily actions, their dependability is of primary concern. This Special Issue focuses on aspects related to the dependability of these emerging computing paradigms and technologies in the context of IoT devices.

The list of possible topics includes but is not limited to:

  • Hardware/software co-design of dependable systems based on emerging computing paradigms and technologies;
  • Safety- and reliability-related applications of emerging computing paradigms and technologies;
  • Security-related aspects of systems based on emerging computing paradigms and technologies;
  • Test and fault tolerance of systems based on emerging computing paradigms and technologies;
  • Reliability assessment of systems based on emerging computing paradigms and technologies;
  • Verification methodologies of systems based on emerging computing paradigms and technologies;
  • Machine learning and Artificial Intelligence techniques for dependability of systems based on emerging computing paradigms and technologies;
  • In-field test and diagnosis of systems based on emerging computing paradigms and technologies;
  • Design-for-testability and design-for-reliability approaches for systems based on emerging computing paradigms and technologies.

Dr. Marcello Traiola
Dr. Elena-Ioana Vǎtǎjelu
Dr. Angeliki Kritikakou
Guest Editors

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Keywords

  • dependability
  • reliability
  • fault tolerance
  • test
  • verification
  • energy efficiency
  • emerging computing paradigms
  • emerging technologies
  • embedded IoT

Published Papers (7 papers)

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Research

23 pages, 5485 KiB  
Article
Approximate Floating-Point Multiplier based on Static Segmentation
by Gennaro Di Meo, Gerardo Saggese, Antonio G. M. Strollo, Davide De Caro and Nicola Petra
Electronics 2022, 11(19), 3005; https://doi.org/10.3390/electronics11193005 - 22 Sep 2022
Cited by 4 | Viewed by 1812
Abstract
In this paper a novel low-power approximate floating-point multiplier is presented. Since the mantissa computation is responsible for the largest part of the power consumption, we apply a novel approximation technique to mantissa multiplication, based on static segmentation. In our approach, the inputs [...] Read more.
In this paper a novel low-power approximate floating-point multiplier is presented. Since the mantissa computation is responsible for the largest part of the power consumption, we apply a novel approximation technique to mantissa multiplication, based on static segmentation. In our approach, the inputs of the mantissa multiplier are properly segmented so that a small inner multiplier can be used to calculate the output, with beneficial impact on power and area. To further improve performance, we introduce a novel segmentation-and-truncation approach which allows us to eliminate the shifter normally present at the output of the segmented multiplier. In addition, a simple compensation term for reducing approximation error is employed. The accuracy of the circuit can be tailored at the design time, by acting on a single parameter. The proposed approximate floating-point multiplier is compared with the state-of-the-art, showing good performance in terms of both precision and hardware saving. For single-precision floating-point format, the obtained NMED is in the range 10−5–7 × 10−7, while MRED is in the range 3 × 10−3–1.7 × 10−4. Synthesis results in 28 nm CMOS show area and power saving of up to 82% and 85%, respectively, compared to the exact floating-point multiplier. Image processing applications confirm the expectations, with results very close to the exact case. Full article
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14 pages, 3721 KiB  
Article
Low-Power Energy-Based Spike Detector ASIC for Implantable Multichannel BMIs
by Gerardo Saggese and Antonio Giuseppe Maria Strollo
Electronics 2022, 11(18), 2943; https://doi.org/10.3390/electronics11182943 - 16 Sep 2022
Cited by 3 | Viewed by 1477
Abstract
Advances in microtechnology have enabled an exponential increase in the number of neurons that can be simultaneously recorded. To meet high-channel count and implantability demands, emerging applications require new methods for local real-time processing to reduce the data to transmit. Nonlinear energy operators [...] Read more.
Advances in microtechnology have enabled an exponential increase in the number of neurons that can be simultaneously recorded. To meet high-channel count and implantability demands, emerging applications require new methods for local real-time processing to reduce the data to transmit. Nonlinear energy operators are widely used to distinguish neural spikes from background noise featuring a good tradeoff between hardware resources and accuracy. However, they require an additional smoothing filter, which affects both area occupation and power dissipation. In this paper, we investigate a spike detector, based on a series of two nonlinear energy operators, and a simple and adaptive threshold, based on a three-point median operator. We show that our proposal provides good accuracy compared to other energy-based detectors on a synthetic dataset at different noise levels. Based on the proposed technique, a 1024-channel neural signal processor was designed in a 28 nm TSMC CMOS process by using latch-based static random-access memory (SRAM), demonstrating a total power consumption of 1.4 μW/ch and a silicon area occupation of 230 μm2/ch. These features, together with a comparison with the state of the art, demonstrate that our proposal constitutes an alternative for the development of next-generation multichannel neural interfaces. Full article
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15 pages, 34302 KiB  
Article
Remote Prototyping of FPGA-Based Devices in the IoT Concept during the COVID-19 Pandemic
by Michał Melosik, Mariusz Naumowicz, Marek Kropidłowski and Wieslaw Marszalek
Electronics 2022, 11(9), 1497; https://doi.org/10.3390/electronics11091497 - 07 May 2022
Cited by 1 | Viewed by 2367
Abstract
This paper presents a system for the remote design and testing of electronic circuits and devices with FPGAs during COVID-19 and similar lockdown periods when physical access to laboratories is not permitted. The system is based on the application of the IoT concept, [...] Read more.
This paper presents a system for the remote design and testing of electronic circuits and devices with FPGAs during COVID-19 and similar lockdown periods when physical access to laboratories is not permitted. The system is based on the application of the IoT concept, in which the final device is a test board with an FPGA chip. The system allows for remote visual inspection of the board and the devices linked to it in the laboratory. The system was developed for remote learning taking place during the lockdown periods at Poznan University of Technology (PUT) in Poland. The functionality of the system is confirmed by two demonstration tasks (the use of the temperature and humidity DHT11 sensor and the design of a generator of sinusoidal waveforms) for students in the fundamentals of digital design and synthesis courses. The proposed solution allows, in part, to bypass the time-consuming simulations, and accelerate the process of prototyping digital circuits by remotely accessing the infrastructure of the microelectronics laboratory. Full article
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19 pages, 4568 KiB  
Article
Machine-Learning-Based Darknet Traffic Detection System for IoT Applications
by Qasem Abu Al-Haija, Moez Krichen and Wejdan Abu Elhaija
Electronics 2022, 11(4), 556; https://doi.org/10.3390/electronics11040556 - 12 Feb 2022
Cited by 58 | Viewed by 6507
Abstract
The massive modern technical revolution in electronics, cognitive computing, and sensing has provided critical infrastructure for the development of today’s Internet of Things (IoT) for a wide range of applications. However, because endpoint devices’ computing, storage, and communication capabilities are limited, IoT infrastructures [...] Read more.
The massive modern technical revolution in electronics, cognitive computing, and sensing has provided critical infrastructure for the development of today’s Internet of Things (IoT) for a wide range of applications. However, because endpoint devices’ computing, storage, and communication capabilities are limited, IoT infrastructures are exposed to a wide range of cyber-attacks. As such, Darknet or blackholes (sinkholes) attacks are significant, and recent attack vectors that are launched against several IoT communication services. Since Darknet address space evolved as a reserved internet address space that is not contemplated to be used by legitimate hosts globally, any communication traffic is speculated to be unsolicited and distinctively deemed a probe, backscatter, or misconfiguration. Thus, in this paper, we develop, investigate, and evaluate the performance of machine-learning-based Darknet traffic detection systems (DTDS) in IoT networks. Mainly, we make use of six supervised machine-learning techniques, including bagging decision tree ensembles (BAG-DT), AdaBoost decision tree ensembles (ADA-DT), RUSBoosted decision tree ensembles (RUS-DT), optimizable decision tree (O-DT), optimizable k-nearest neighbor (O-KNN), and optimizable discriminant (O-DSC). We evaluate the implemented DTDS models on a recent and comprehensive dataset, known as the CIC-Darknet-2020 dataset, composed of contemporary actual IoT communication traffic involving four different classes that combine VPN and Tor traffic in a single dataset covering a wide range of captured cyber-attacks and hidden services provided by the Darknet. Our empirical performance analysis demonstrates that bagging ensemble techniques (BAG-DT) offer better accuracy and lower error rates than other implemented supervised learning techniques, scoring a 99.50% of classification accuracy with a low inferencing overhead of 9.09 µ second. Finally, we also contrast our BAG-DT-DTDS with other existing DTDS models and demonstrate that our best results are improved by (1.9~27%) over the former state-of-the-art models. Full article
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13 pages, 645 KiB  
Article
Strengthening Quality of Chaotic Bit Sequences
by Michal Melosik and Wieslaw Marszalek
Electronics 2022, 11(2), 272; https://doi.org/10.3390/electronics11020272 - 15 Jan 2022
Cited by 2 | Viewed by 1479
Abstract
We discuss chaos and its quality as measured through the 0-1 test for chaos. When the 0-1 test indicates deteriorating quality of chaos, because of the finite precision representations of real numbers in digital implementations, then the process may eventually lead to a [...] Read more.
We discuss chaos and its quality as measured through the 0-1 test for chaos. When the 0-1 test indicates deteriorating quality of chaos, because of the finite precision representations of real numbers in digital implementations, then the process may eventually lead to a periodic sequence. A simple method for improving the quality of a chaotic signal is to mix the signal with another signal by using the XOR operation. In this paper, such mixing of weak chaotic signals is considered, yielding new signals with improved quality (with K values from the 0-1 test close to 1). In some sense, such a mixing of signals could be considered as a two-layer prevention strategy to maintain chaos. That fact may be important in those applications when the hardware resources are limited. The 0-1 test is used to show the improved chaotic behavior in the case when a continuous signal (for example, from the Chua, Rössler or Lorenz system) intermingles with a discrete signal (for example, from the logistic, Tinkerbell or Henon map). The analysis is presented for chaotic bit sequences. Our approach can further lead to hardware applications, and possibly, to improvements in the design of chaotic bit generators. Several illustrative examples are included. Full article
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22 pages, 783 KiB  
Article
Performance Evaluation of Message Routing Strategies in the Internet of Robotic Things Using the D/M/c/K/FCFS Queuing Network
by Leonel Feitosa, Glauber Gonçalves, Tuan Anh Nguyen, Jae Woo Lee and Francisco Airton Silva
Electronics 2021, 10(21), 2626; https://doi.org/10.3390/electronics10212626 - 27 Oct 2021
Cited by 4 | Viewed by 1528
Abstract
The Internet of Robotic Things (IoRT) has emerged as a promising computing paradigm integrating the cloud/fog/edge computing continuum in the Internet of Things (IoT) to optimize the operations of intelligent robotic agents in factories. A single robot agent at the edge of the [...] Read more.
The Internet of Robotic Things (IoRT) has emerged as a promising computing paradigm integrating the cloud/fog/edge computing continuum in the Internet of Things (IoT) to optimize the operations of intelligent robotic agents in factories. A single robot agent at the edge of the network can comprise hundreds of sensors and actuators; thus, the tasks performed by multiple agents can be computationally expensive, which are often possible by offloading the computing tasks to the distant computing resources in the cloud or fog computing layers. In this context, it is of paramount importance to assimilate the performance impact of different system components and parameters in an IoRT infrastructure to provide IoRT system designers with tools to assess the performance of their manufacturing projects at different stages of development. Therefore, we propose in this article a performance evaluation methodology based on the D/M/c/K/FCFS queuing network pattern and present a queuing-network-based performance model for the performance assessment of compatible IoRT systems associated with the edge, fog, and cloud computing paradigms. To find the factors that expose the highest impact on the system performance in practical scenarios, a sensitivity analysis using the Design of Experiments (DoE) was performed on the proposed performance model. On the outputs obtained by the DoE, comprehensive performance analyses were conducted to assimilate the impact of different routing strategies and the variation in the capacity of the system components. The analysis results indicated that the proposed model enables the evaluation of how different configurations of the components of the IoRT architecture impact the system performance through different performance metrics of interest including the (i) mean response time, (ii) utilization of components, (iii) number of messages, and (iv) drop rate. This study can help improve the operation and management of IoRT infrastructures associated with the cloud/fog/edge computing continuum in practice. Full article
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17 pages, 3593 KiB  
Article
Monitoring the Health and Residence Conditions of Elderly People, Using LoRa and the Things Network
by José Paulo Lousado, Ivan Miguel Pires, Eftim Zdravevski and Sandra Antunes
Electronics 2021, 10(14), 1729; https://doi.org/10.3390/electronics10141729 - 19 Jul 2021
Cited by 8 | Viewed by 2683
Abstract
The rapid development and widespread use of information and telecommunication technologies do not mitigate, in many situations, information exclusion, nor the physical isolation of people—mainly that of the elderly living in remote locations, whose mobile network coverage is deficient or non-existent, preventing them [...] Read more.
The rapid development and widespread use of information and telecommunication technologies do not mitigate, in many situations, information exclusion, nor the physical isolation of people—mainly that of the elderly living in remote locations, whose mobile network coverage is deficient or non-existent, preventing them from accessing health care, be it routine follow-up procedures or emergencies. Addressing this, we raise the question that guides our study: how can we monitor the elderly’s residence and health conditions, detect falls, and track their movement in the vicinity of their homes in a non-intrusive manner? To answer this question, we present a system prototype that uses affordable, low-cost, and low-energy equipment with media and data processing, supported by LoRa (Long Range) and ESP32 microcontrollers, coupling several sensors. As a result, it is possible to monitor sensors that predict and detect falls or other risk events for the user, e.g., fire, with authorized persons and entities, family members, civil protection, and security forces accessing the gathered data, assuring their security. We conclude that the system could decisively improve people’s quality of life, particularly those of the elderly who live in remote places with greater vulnerability. Full article
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