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Article

Floating Interleaved Boost Converter with Zero-Ripple Input Current Using Variable Inductor

1
Mechatronics Department, Technological National of Mexico/Higher Technological Institute of Villa La Venta, Huimanguillo 86410, Mexico
2
Electronics Department, Technological National of Mexico/Technological Institute of Celaya, Celaya 38010, Mexico
3
Department of Computational Sciences and Engineering, Universidad de Guadalajara/Centro Universitario de los Valles, Ameca 46600, Mexico
4
The “Universidad de Panama”, Faculty of Informatics, Electronics and Communications, Central Campus, Panama 0843-03561, Panama
5
Electronics Department, Technological National of Mexico/Higher Technological Institute from South of Guanajuato, Benito Juárez 38980, Mexico
*
Author to whom correspondence should be addressed.
Technologies 2023, 11(1), 21; https://doi.org/10.3390/technologies11010021
Submission received: 30 December 2022 / Revised: 17 January 2023 / Accepted: 21 January 2023 / Published: 28 January 2023
(This article belongs to the Section Environmental Technology)

Abstract

:
A zero-ripple input current is known to improve the lifetime of battery sets and fuel cells and to assure maximum power point tracking in PV panels. To perform current ripple elimination in a floating interleaved boost converter (FIBC), one of the typical linear inductors is substituted by a variable inductor, and phases of the converter have complementary duty cycles. This variable inductor is controlled using a switched current-source converter, which adjusts the input current ripple. An equivalent model for the variable inductor is presented, including uncertainties in the component description. To achieve current stabilization, a variable inductor controller was designed using the sliding modes approach via fixed frequency. An experimental prototype is implemented and tested with an output voltage controller to compare with the conventional FIBC. The results demonstrate that the input current ripple of the proposed converter is eliminated without significantly decreasing the efficiency.

1. Introduction

Environmental pollution problems have increased the use of renewable energy and ways of transportation that do not depend on fossil fuels. Renewable energy sources with a long lifetime are essential for the economic viability of electric vehicles and smart grid infrastructure. One of the causes of the renewable energy sources’ degradation, such as fuel cells (FCs) and photovoltaic panels (PVs), is the input current ripple (ICR) of the dc–dc converters [1,2].
To minimize the ripple in the dc–dc converters, different techniques have been proposed, such as, for example, the use of coupled inductors in a single core [3]; however, this method has a limited voltage gain and a complex design. An alternative option with fewer components is based on tapped inductors with a ripple cancelation network [4], which consists of a parallel LC network that counteracts the current in the tapped inductor, achieving optimal results in eliminating the ICR for a conventional boost converter; the main drawback is the increase in current stress in the semiconductors and an increase in the design complexity.
Interleaved converters (ICs) have been proposed to overcome these issues and reduce the power losses in switching devices. The ICR in IC is minimized only in certain operating points with specific switching frequencies and phase-shift [5], which is its main drawback. This problem may be solved by using a frequency control in discontinuous conduction mode [6]; however, the latter technique limits the voltage ratio. Moreover, an extra double-loop controller is required to compensate for inductance variation.
Another challenge for boost converters is to achieve high voltage gain; different alternatives may be employed, including the cascade connection [7], where the main disadvantage is the losses. Recently, a floating interleaved boost converter (FIBC) has been introduced to increase the gain of conventional converters [8]. However, the main disadvantage is the zero-ripple input current in a fixed point. In [9], a current mirror technique between phases is proposed, achieving the total elimination of the ICR demanded from the power supply; in this case, the condition is restricted in the vicinity of the selected operating point for two phases.
On the other hand, the current trend to improve the characteristics of power inductors has led to exploring the use of variable inductors (VIs). In [10,11,12,13,14,15,16], a feasibility study is presented to integrate a VI in a dc–dc converter with a dynamic load variation, obtaining significant results in reducing the core size and the current ripple. The VI is a current-controlled device with low-power consumption. Moreover, this device can operate in different conduction modes. In [17], a magnetic control is presented, which takes advantage of the inductance variation to regulate the average current in the discontinuous conduction mode. In [18], a VI is proposed to control the switching frequency in critical conduction mode. Meanwhile, the power factor is corrected via the closed-loop main boost converter.
This paper presents a zero-ripple input current FIBC using a VI, including the output voltage control strategy. The converter offers a high boosting gain and a zero current ripple for a wider operating region. The primary function of VI is to regulate the ripple in one of the phases to achieve a proportional mirror current, resulting in total ICR elimination independent of the operating point for two interleaved phases, which is the main advantage over other techniques. An auxiliary winding is introduced to the magnetic core, which is connected to a switched current-source converter (SCC). A current controller is proposed to lead with uncertainties and parameter variations in the VI. The reference current of the current controlled auxiliary converter is obtained from the control current estimator based on the duty cycle. An experimental implementation was conducted to evaluate the proposal’s effectiveness using the circuit depicted in Figure 1.
This paper is organized as follows. In Section 2, the operation and analysis are conducted, including the voltage gain, dynamic modeling, and control of the main converter. Section 3 introduces the operation principle and design method for the VI. The equivalent model of the VI and proposed controller with a reference current estimator are provided in Section 4. Experimental results and the corresponding analysis are described in Section 5. Finally, the paper is concluded in Section 6.

2. Main Converter Analysis

The FIBC is shown in Figure 2a. This converter is applied in FC and PV applications to reduce the current and voltage stress in the switching devices, which substantially increases the overall efficiency of the system by reducing the ICR [19].
To increase the voltage gain, a duty cycle different from 0.5 is required. The switches S 1 and S 2 operate inversely to minimize the ICR owing to the summation of the currents through each inductor. In this case, the phases present opposite slopes and complementary duty cycles, as shown in Figure 2b.

2.1. Steady State Analysis

The elimination of the ICR is achieved by matching the current ripple in the inductors, which can be mathematically expressed using the equation:
V s d L 1 f = V s ( 1 d ) L 2 f ,
where f is the switching frequency, d is the duty cycle for the converter, L 1 and L 2 are the inductances, and V s is the source voltage. After some elementary algebraic transformations, Equation (1) yields:
L 2 = ( 1 d ) d L 1 .
It follows immediately from (2) that, in order to compensate for the change in the duty cycle d , the inductance ( L 2 ) must be a variable one. According to Kirchhoff’s voltage law, the output voltage V o is given as:
V o = V s 1 d + V s d V s ,
hence, the static gain of the converter is:
V o V s = 1 d ( 1 d ) d ( 1 d ) .
Denoting M = V o / V s , and assuming that ICR is completely mitigated, one obtains from (3) the value of the duty cycle:
d = 1 + 1 4 M + 1 2 .
The voltage gain M of Equation (4) for different values of d is shown in Figure 3.

2.2. The Dynamic Model of FIBC

According to the model presented in [9] with complementary duty cycles, under continuous conduction mode, the averaged model of the converter is:
L 1 x ˙ 1 = V s ( 1 d ) x 2 ,
C 1 x ˙ 2 = ( 1 d ) x 1 ( x 2 + x 4 V s ) R ,
L 2 x ˙ 3 = V s d x 4 ,
C 2 x ˙ 4 = d x 3 ( x 2 + x 4 V s ) R ,
where the state variable x 1 represents the average inductor current ( i L 1 ), x 2 represents the average capacitor voltage ( V 1 ), x 3 represents the average inductor current ( i L 2 ), and x 4 represents the average capacitor voltage ( V 2 ). The components L 1 , L 2 , C 1 , C 2 , and R represent the inductors, capacitors, and load resistor, respectively.
Setting to zero, the relevant derivatives in (6) yields:
x ¯ 1 = ( x ¯ 2 + x ¯ 4 V s ) R ( 1 d ¯ ) ,
y ¯ 1 = x ¯ 2 = V s ( 1 d ¯ ) ,
x ¯ 3 = ( x ¯ 2 + x ¯ 4 V s ) R d ¯ ,
y ¯ 2 = x ¯ 4 = V s d ¯ ,
from Equation (7), one may obtain the equilibrium point.
From Equation (6), the linearization of the average model, around the desired equilibrium point ( x ¯ 1 , x ¯ 2 , x ¯ 3 , x ¯ 4 , d ¯ ) , yields the following state equations:
x ˜ ˙ = A x ˜ + B d ˜ , y ˜ = C x ˜ ,
with x ˜ = [ x ˜ 1   x ˜ 2   x ˜ 3   x ˜ 4 ] T , x ˜ 1 = x 1 x ¯ 1 , y ˜ 1 = x ˜ 2 = x 2 x ¯ 2 , x ˜ 3 = x 3 x ¯ 3 , y ˜ 2 = x ˜ 4 = x 4 x ¯ 4 , d ˜ = d d ¯ and y ˜ = [ y ˜ 1   y ˜ 2 ] T = y y ¯ , where the superscript (~) represents the linearized signal. The system matrix is given by:
A = [ 0 ( 1 d ¯ ) L 1 0 0 ( 1 d ¯ ) C 1 1 R C 1 0 1 R C 1 0 0 0 d ¯ L 2 0 1 R C 2 d ¯ C 2 1 R C 2 ]
While the input matrix is given by:
B = [ x 2 ¯ L 1 x 1 ¯ C 1 x 4 ¯ L 2 x 3 ¯ C 2 ] T .
In the case of the output matrix:
C = [ 0 1 0 0 0 0 0 1 ] .
The matrix transfer function corresponding to the state Equation (8) is:
G ( s ) = C ( s I A ) 1 B .
Expression (12) can be developed into
[ G 1 ( s ) = x ˜ 2 d ˜ G 2 ( s ) = x ˜ 4 d ˜ ] = [ b 10 s 3 + b 11 s 2 + b 12 s + b 13 s 4 + a 1 s 3 + a 2 s 2 + a 3 s + a 4 0 b 20 s 3 + b 21 s 2 + b 22 s + b 23 s 4 + a 1 s 3 + a 2 s 2 + a 3 s + a 4 ] ,
where the numerator coefficients of Equation (13) are:
b 10 = x ¯ 1 C 1 ;   b 11 = x ¯ 2 ( 1 u ¯ ) L 1 C 1 x ¯ 1 + x ¯ 3 R C 1 C 2 ; b 12 = x ¯ 4 L 1 u ¯ + x ¯ 2 L 2 ( 1 u ¯ ) R L 1 C 1 L 2 C 2 x ¯ 1 u ¯ 2 L 2 C 1 C 2 ;   b 13 = x ¯ 2 u ¯ 2 ( 1 u ¯ ) L 1 C 1 L 2 C 2 ; b 20 = x ¯ 3 C 2 ;   b 21 = ( x ¯ 1 + x ¯ 3 ) R C 1 C 2 x ¯ 4 u ¯ L 2 C 2 ; b 22 = 1 R C 1 C 2 ( x ¯ 4 u ¯ L 2 + x ¯ 2 ( 1 u ¯ ) L 1 ) + x ¯ 3 ( u ¯ 2 2 u ¯ + 1 ) L 1 C 1 C 2 ; b 23 = x ¯ 4 ( u ¯ 3 2 u ¯ 2 + u ¯ ) L 1 C 1 L 2 C 2 .
and the denominator coefficients of Equation (13) are:
a 1 = C 1 + C 2 R C 1 C 2 ;   a 2 = L 1 C 1 u ¯ 2 + L 2 C 2 ( 1 u ¯ ) 2 L 1 C 1 L 2 C 2 ; a 3 = L 1 u ¯ 2 + L 2 ( 1 u ¯ ) 2 R L 1 C 1 L 2 C 2 ;   a 4 = u ¯ 2 ( 1 u ¯ ) 2 L 1 C 1 L 2 C 2 .

2.3. Output Voltage Control

In this system, it is possible to control both capacitor voltages with only one controller. The different dynamic transfer functions from (13) are added to obtain the relation between the input d ˜ and output V ˜ o . Considering V s as a perturbation, this yields:
G v ( s ) = V ˜ o d ˜ = b 1 s 3 + b 2 s 2 + b 3 s + b 4 s 4 + a 1 s 3 + a 2 s 2 + a 3 s + a 4 ,
where b 1 = b 10 + b 20 , b 2 = b 11 + b 21 , b 3 = b 12 + b 22 and b 4 = b 13 + b 23 .
The inductance variation of L 2 produces an interval plant and is considered for controller design, with L 2 as a minimum inductance and L 2 + as a maximum inductance. Expression (14) is defined as a set of transfer functions achieved using:
G v ( s , b , a ) = N ( s , b ) D ( s , a ) = i = 0 m b i s i i = 0 n a i s i ,
and coefficients are supposed to vary within the following bounds:
b i b i b i + , i = 0 ,   1 , ,   m , a i a i a i + , i = 0 ,   1 , ,   n ,
where b i represents the minimum numerator coefficient, b i + represents the maximum numerator coefficient, a i represents the minimum denominator coefficient, and a i + represents the maximum denominator coefficient.
A first-order controller is needed with an acceptable range, which robustly stabilizes the trajectories of the closed-loop system, under parameter variations, around a region defined by the interval plant. The output voltage controller is chosen as a proportional-integral controller as follows:
C ( s ) = K i + K p s s ,
where K p is the proportional gain and K i is the integral gain.
The characteristic equation for a closed-loop system is expressed as follows:
P ( s , C ) = 1 + C ( s ) G v ( s , b , a ) .
Using (18), the transfer function (15) is evaluated with a uniform distribution of interval L 2 ϵ [ L 2 , L 2 + ] . The stability of these polynomials can be tested via Routh–Hurwitz test. The stability condition must be fulfilled for all transfer functions—in this case, the number selected is ten. This proof generates an area of the acceptable range of controller parameters ( K p , K i > 0 ) that robustly stabilize the interval plant, as depicted in Figure 4.
The closed-loop Bode diagram for the linear control system of the plant model (15) with the controller designed is shown in Figure 5. The crossover frequency is 561 Hz. The phase margin is ranged from 37.6° to 40.1° and the gain margin ranged from 7.73 dB to 9.11 dB.

3. Variable Inductor Operation and Design

The VI based on a double E-core contains a control winding and the main winding. The principle of operation is based on the variation of the main winding inductance through the control of the flux created by the control winding. The reluctance model and design algorithms have been reported in the literature [20,21].
Figure 6a shows a schematic representation of the windings for practical implementation. Figure 6b illustrates the operating points on the B–H curve.
The reluctance model depicted in Figure 7 is required to determine the appropriate characteristics and paths of VI.
The inductance will vary between points A and B, according to Figure 5. Point A starts after the linear region; point B reaches the value before the core saturation. Point A has the minimum current ripple when ΔiL2 = ΔiL2_min, having a control current ic = 0; thus, the main inductance is maximum L2 = Lmax.
The maximum inductance can be obtained with [21]:
L m a x = ( N L 2 ) 2 R g + 2 R 1 + R 2 + R 3 ,
where R g , R 1 , R 2 , and R 3 are the equivalent reluctances values of the gap, center arm, left arm, and right arm, respectively, and N L 2 is the main winding number of turns.
The final state reaches point B when the current ripple is maximum ΔiL2 = ΔiL2_max, and the current is maximum ic = ic_max; therefore, the main inductance is minimum L2 = Lmin. Control winding N c creates a magnetic saturation along the flux path of the left and right arms. Then, the reluctance R 2 and R 3 must be replaced with R 2 s a t and R 3 s a t . The length of the saturated area in the core is associated with the values provided by the manufacturer, as shown in Figure 8.
The calculation of the equivalent reluctance for the saturated condition is necessary to determine the length of the saturated region, as follows [21]:
L 2 s a t = w 3 16 + w 2 w 3 2 + w 1 w 2 8 ,
L 3 s a t = a 2 + a 1 a 2 4 ,
where w i and a i are the length values provided by the manufacturer. The equivalent reluctance for saturation condition R 2 s a t and R 3 s a t can be calculated as:
R i s a t = l i s a t μ d s A i ,   i = 2 ,   3
where l i s a t is the length of the magnetic path i , μ d s is the value of the differential permeability for the saturation condition, and A i is the cross-section of the path. The properties of the magnetic materials are illustrated in B–H curves, where the permeability for each reluctance is obtained; then, the equations are achieved using:
μ d = lim H 0 B H ,
μ d s = d B s a t d H s a t .
Equation (23) is the slope of the linear region, which is required to estimate the reluctance in (19). Considering (20)–(24), the minimum inductance can be obtained as:
L m i n = ( N L 2 ) 2 R g + 2 R 1 + R 2 s a t + R 3 s a t ,
Flux density must be limited to guarantee that the VI does not operate in the saturation region. Thus, the following condition must be fulfilled [22]:
B m a x B s a t .
From (26), the maximum peak current iL2_max can be calculated as:
i L 2 m a x 0.3 R t o t a l A c B s a t N L 2 ,
where R t o t a l is the denominator of (19), A c is the cross-section of the center arm, and B s a t is the saturation flux density. If Equation (27) cannot be fulfilled, a bigger core must be selected. Furthermore, the control winding number of turns is achieved using:
N c = 2 H s a t ( l 2 + l 3 ) i c _ m a x ,
where H s a t is the saturation magnetic field and l 2 and l 3 are the magnetic paths of the right arm and left arm, respectively.

4. Current Controller and Reference Estimator

4.1. Current Controller for VI

The VI, in general, suffers from two main uncertainties. The first is the parameter variations, where the inductance changes due to the current of the main converter and auxiliary SCC. The temperature effect is the second important source of uncertainty and is typically unknown.
The dynamic model of VI with uncertainties is written as:
d i c d t = R c L c i c + V i n L c d c + g ( i c , t ) ,
where i c , L c , and R c are the control current, inductance, and resistance of the control inductor, respectively, g ( i c , t ) is the perturbation term that contains parameter variations and external disturbances, V i n is the voltage input of switching current-source converter, and d c is the control input.
The perturbation term g ( i c , t ) is unknown but bounded. Moreover, consider that g ( i c , t ) satisfies the matching condition [23], that is:
g ( i c , t ) = V i n L c g ¯ ( i c , t ) .
From (29) and (30), the dynamic model of VI can be expressed as follows:
d i c d t = R c L c i c + V i n L c ( d c + g ¯ ( i c , t ) ) .
The norm of perturbation term g ( i c , t ) is calculated considering a Lipschitz condition, that is:
g ( i c , t ) R c L c .
A sliding mode controller (SMC) via fixed-frequency f c is proposed to add robustness under uncertainties. Considering i r e f as the current reference, a sliding surface can be written as:
s = i c i r e f .
In order to drive the sliding surface (33) to zero, the following reaching law is proposed:
s s ˙ = η | s | ,     η > 0 .
Substituting the time derivative of (33) into (34) to stabilize the system (31) and regulate the current i c = i r e f , the control input is selected as:
d c = L c V i n ( R c L c i c η s i g n ( s ) ) .
Under the condition η > g ( i c , t ) , Equation (34) is negative and the surface (33) converges to zero in a finite time [23].

4.2. Reference Estimator

The current reference estimator is determined from a series of tests. For several average current levels of i L 2 in the main winding, the control current i c is varied in steps of 5 mA until a minimum ICR in i s is noticed for each duty cycle. The effect of i L 2 on inductance is not significant for this converter since the current variation of the variable inductor phase is less than 500 mA.
Figure 9 demonstrates the characteristics of the inductance curve as a function of the DC control current. As can be observed, the inductance value is inversely proportional to the control current.
A linear approximation can be used to relate the control current and inductance L 2 over a specified span as follows:
L 2 = L 1 Δ L 2 Δ i c ( i c i c _ m i n ) .
where Δ L 2 is the change in the value of L 2 , Δ i c is the change in the value of i c , and i c _ m i n is the minimum control current. Considering Equation (2), when i c = i r e f with i r e f as the reference current, that is:
i r e f = i c _ m i n Δ i c Δ L 2 L 1 ( 1 2 d d ) .

5. Experimental Results

A prototype of FIBC and VI was implemented to validate the proposed zero-ripple input current method (Figure 10). The specifications of the prototype are shown in Table 1. The controllers were implemented using a CompactRIO embedded system with an NI cRIO-9067 chassis, NI 9223 analog input module, and NI 9401 digital output module.
The VI was implemented in an ETD 59/31/22 E-core with 3C90 magnetic material, N L 2 = 43, N c = 185. A first test was performed to measure the control inductance L c using a Hewlett Packard 4263B LCR meter. In this case, the main current i L 2 = 0, for which L c presents an average value of 120 mH and ESR of 3.2 Ω. The current controller was set up and incorporated these parameters and the controller gain η = 15.
Once the VI controller was finished, the test was carried out with the main converter in an open/closed loop. Two tests are made in an open loop: 300 Ω constant output load and 150 V constant output voltage V o . In the case of a closed loop, two types of tests are made: change of load from half load to full load and change of input voltage V s .

5.1. Main Converter Open-Loop Test

Figure 11 shows the current of inductors in the traditional duty cycle d = 0.5 for two-phase interleaved converters when the output load was 300 Ω and zero-ripple input current occurs naturally. It can be observed that the current ripple Δ i L 2 of the VI is distorted due to many reasons: the core is forced to operate within the limits of the linear and transitions regions when i c = 0, but also within the unbalance of the winding arms, which has an impact on the magnetic reluctance and parasites and the parasitic capacitance of the windings in high frequency [24]. A small film capacitor can be added to remove the residual ICR in the case of L_1 parameter deviation.
In Figure 12a, the duty cycle is set to d = 0.7; the ICR presents a deviation compared to the operation with d = 0.5. There is a high ICR, in this case, since the inductances are different. The average currents of the inductors are i_L1 = 2 A and i_L2 = 1 A, and the current ripple distortion is maintained.
Figure 12b shows that the ICR for both inductors are now different; however, the current ripple with the same magnitude, and then a zero-ripple input current, occurs with the corresponding control current ( i c = 395 mA). The signal waveform behavior depicted in Figure 2 is therefore confirmed. The current ripple distortion is slightly noticeable, and the duty cycle is kept.
The transient state waveform of the VI current ripple is shown in Figure 13. The control current of the inductor i c is changed from 0 to 395 mA. The ICR changes from Δ i L 2 = 0.7 A to zero-ripple, and the transient response is about 8 ms with asymptotic behavior. This characteristic behavior is required with the closed-loop main converter when this variation represents a negligible disturbance. As observed, the inductor current Δ i L 1 and output voltage V o are not affected by increased Δ i L 2 . Larger the value of η the faster the trajectory converges to the sliding surface. The closed-loop response of VI should be faster than the transient response of the main converter to guarantee stability.
A comparison of the measured efficiency with different output powers is depicted in Figure 14. The efficiency values presented were all measured using the Chroma 62204 power meter, 48 V nominal input voltage V s , and 150 V nominal output voltage V o . The converter efficiency with the zero-ripple input current presents a similar trajectory with a maximum difference of 0.92 %, including the VI power consumption. The efficiency of the proposed converter-rated power is 94.47%, which is 0.24% less than conventional. The maximum control current in this test is i c = 280 mA at 50 W. The efficiency decrease is due to power losses in the SCC and conduction loss in the auxiliary winding of the VI. Knowledge of these power losses is necessary to evaluate the conversion efficiency of the system. The losses of the inductor L 2 and the diodes strongly influence the total efficiency of the converter. The effect of the capacitor series resistance is negligible for the voltage gain factor. The efficiency of the phases is expected to be different compared to the conventional FIBC.

5.2. Main Converter Closed-Loop Test

The dynamic response of FIBC under the action of a robust PI controller is shown in Figure 15 when the output load is changed from half load to full load and the reference voltage is 150 V. As can be observed, variation in the inductance parameter value L 2 does not cause a significant change in performance or stability. Additionally, according to the load step test, one can conclude that the zero-ripple input current in the transient response is maintained. The settling time is about 2 ms, which is a good response for boosting converters with high gain, and the voltage overshoot is 8 V.
The controller is tested under input voltage change from 48 V to 43 V and vice versa (Figure 16). A fast dynamic response is observed, and the zero-current ripple is maintained all the time, even at different operating points, which is the main advantage of the proposal. The dynamic response is about 60 ms, and the voltage overshoot and voltage drop are within 13 V. In summary, the dynamic experiment shows that the proposed converter has strong robustness under the PI control strategy, which is beneficial to ensure the stable output of the power source.

6. Conclusions

In this paper, a zero-ripple input current FIBC using a VI has been introduced. The inductance variation is fast and its effect is reflected in the main converter as a negligible disturbance. The converter presents a wide operating region without affecting the zero-ripple condition. The interval plant model stability is verified via Routh–Hurwitz. The PI controller is designed under parameter variation of inductance. The dynamical behavior of the converter permits the use of only one voltage controller. Only one magnetic component is used to achieve the power transfer and zero-ripple. The main converter and the SCC are galvanically isolated. Different voltage supplies can be used for the current regulation of the VI. A dynamic model has been developed which describes the behavior of a VI, including uncertainties. Experimental results of the proposed SCC revealed that a simple current control loop is employed to adjust the inductance, and that the efficiency of the main converter is not significantly decreased. Operating at the rated 100 W power, the proposed converter achieved 94.47% efficiency. The current controller offers remarkable accuracy, robustness, low computational load, and easy tuning for implementation. The proposed reference estimator determines the amount of auxiliary winding current based on the main duty cycle levels. The introduced converter is suitable for renewable sources where a lower ripple is demanded. Future research will focus on the experimental validation of the proposed estimator with a large-scale VI-based DC–DC converter with variable load.

Author Contributions

Conceptualization, H.H. and N.V.; Investigation, H.H.; Methodology, N.V. and H.H.; Supervision, N.V., R.O., H.H.-Á. and S.P.; Writing—original draft, H.H.; Writing—review and editing, N.V., S.P. and L.E. All authors have read and agreed to the published version of the manuscript.

Funding

This work was sponsored by TecNM.

Data Availability Statement

Data is contained in the paper.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Schematic diagram of FIBC with a VI and its control structure.
Figure 1. Schematic diagram of FIBC with a VI and its control structure.
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Figure 2. Two-phase FIBC when D 1 = 0.7 and D 2 = 0.3: (a) schematic diagram; (b) relevant waveforms.
Figure 2. Two-phase FIBC when D 1 = 0.7 and D 2 = 0.3: (a) schematic diagram; (b) relevant waveforms.
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Figure 3. Voltage gain of FIBC for different values of d .
Figure 3. Voltage gain of FIBC for different values of d .
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Figure 4. Acceptable proportional and integral gains; the red dot represents the selected controller parameters.
Figure 4. Acceptable proportional and integral gains; the red dot represents the selected controller parameters.
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Figure 5. Bode diagram of closed-loop transfer functions for uniform distributed parameter L 2 .
Figure 5. Bode diagram of closed-loop transfer functions for uniform distributed parameter L 2 .
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Figure 6. Complete VI model: (a) winding distribution; (b) operating points on B–H curve.
Figure 6. Complete VI model: (a) winding distribution; (b) operating points on B–H curve.
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Figure 7. Reluctance model of VI.
Figure 7. Reluctance model of VI.
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Figure 8. Dimensions of magnetic E-core for modified reluctance calculation.
Figure 8. Dimensions of magnetic E-core for modified reluctance calculation.
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Figure 9. Characteristic inductance curve.
Figure 9. Characteristic inductance curve.
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Figure 10. Experimental prototype.
Figure 10. Experimental prototype.
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Figure 11. Traditional duty cycle d = 0.5.
Figure 11. Traditional duty cycle d = 0.5.
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Figure 12. Waveforms of currents/voltage of open loop tests: (a) ICR presence at d = 0.7; (b) zero-ripple input current at d = 0.7.
Figure 12. Waveforms of currents/voltage of open loop tests: (a) ICR presence at d = 0.7; (b) zero-ripple input current at d = 0.7.
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Figure 13. Ripple current in a steady state.
Figure 13. Ripple current in a steady state.
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Figure 14. Efficiency comparison.
Figure 14. Efficiency comparison.
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Figure 15. Transient response under load changes.
Figure 15. Transient response under load changes.
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Figure 16. Transient response under input voltage change.
Figure 16. Transient response under input voltage change.
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Table 1. Specifications of the prototype.
Table 1. Specifications of the prototype.
Parameter–ComponentValue and Information
Rated power100 W
FIBC frequency f
SCC frequency f c
Input voltage V s / V i n
MOSFET S 1
MOSFET S 2
MOSFET S 5
Diode S 3 , S 4 and S 6
Film capacitor C 1
Film capacitor C 2
Inductor   L 1
Variable   inductor   L 2
40 kHz
20 kHz
48 V/12V
C3M0065090D
C2M0160120D
IRF640
MUR1560G
15 μF, 600 V, ESR 4 mΩ
15 μF, 600 V, ESR 4 mΩ
860 μH, 6A, ESR 215 mΩ
200–860 μH, 2.6A, ESR 175 mΩ
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MDPI and ACS Style

Hidalgo, H.; Vázquez, N.; Orosco, R.; Huerta-Ávila, H.; Pinto, S.; Estrada, L. Floating Interleaved Boost Converter with Zero-Ripple Input Current Using Variable Inductor. Technologies 2023, 11, 21. https://doi.org/10.3390/technologies11010021

AMA Style

Hidalgo H, Vázquez N, Orosco R, Huerta-Ávila H, Pinto S, Estrada L. Floating Interleaved Boost Converter with Zero-Ripple Input Current Using Variable Inductor. Technologies. 2023; 11(1):21. https://doi.org/10.3390/technologies11010021

Chicago/Turabian Style

Hidalgo, Hector, Nimrod Vázquez, Rodolfo Orosco, Hector Huerta-Ávila, Sergio Pinto, and Leonel Estrada. 2023. "Floating Interleaved Boost Converter with Zero-Ripple Input Current Using Variable Inductor" Technologies 11, no. 1: 21. https://doi.org/10.3390/technologies11010021

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