# Reduced-Cost Optimization-Based Miniaturization of Microwave Passives by Multi-Resolution EM Simulations for Internet of Things and Space-Limited Applications

^{1}

^{2}

^{*}

## Abstract

**:**

^{2}, in comparison to 52, 275, 525 and 213 mm

^{2}of the initial (and already compact) design.

## 1. Introduction

## 2. Miniaturization of Microwave Passives by Multi-Fidelity Simulations

#### 2.1. Problem Formulation

_{k}(

**x**) ≤ 0, k = 1, …, n

_{g}, as well as equality constraints h

_{k}(

**x**) = 0, k = 1, …, n

_{h}. In (1), U is the scalar objective function quantifying the design quality, and

**x**denotes the vector of design variables. For size reduction, U(

**x**) = A(

**x**), with A being the circuit size. Here, we adopt a penalty approach [50], in which the constraints are dealt with in an implicit manner. Thus, the reformulated objective function U

_{P}is employed, which accounts for the primary objective (here, the component′s footprint) and other requirements. We have

_{P}is defined as follows

_{k}(

**x**), k = 1, …, n

_{g}+ n

_{h}, representing the penalty functions that quantify constraint violations, whereas β

_{k}denotes the penalty coefficients. In (3), the primary objective (size reduction) is supplemented by the contributions proportional to suitably quantified constraint violations. The coefficients β

_{k}are typically set up based on designer’s experience on a case-to-case basis.

#### 2.2. Search Engine: Trust-Region Local Search

**x**

^{(i)}, i = 0, 1, …, to

**x**

^{*}(i.e., the optimal solution), where

**x**

^{(0)}denotes the initial design. Each consecutive vector

**x**

^{(i)}is established by solving

_{L}

^{(i)}is defined as U

_{P}, but with linear model L

^{(i)}of the circuit response

**R**(

**x**). Our principal objective is to reduce the circuit size A(

**x**), which can be evaluated analytically based on the parameter vector

**x**. Thus, there is no need to use the linear model to assess it. Still, when calculating the constraints, the linear expansion model L

^{(i)}=

**R**(

**x**

^{(i)}) +

**J**(

_{R}**x**

^{(i)})·(

**x**−

**x**

^{(i)}) needs to be employed.

#### 2.3. Model Fidelity Arrangement

_{min}has to ensure adequate accuracy of the associated model while offering sufficient computational savings, whereas the highest resolution r

_{max}needs to provide an accurate representation of the system outputs.

_{min}(for the sake of computational savings); (ii) in the consecutive iterations, the resolution r is increased step-by-step, contingent upon the convergence status of the optimization procedure; and (iii) close to the termination, r

_{max}is enforced (for the sake of reliability).

_{x}and ε

_{U}referring to the user-defined termination thresholds. The optimization procedure has reached convergence if the following holds: ||

**x**

^{(i+1)}−

**x**

^{(i)}|| < ε

_{x}(the design shift between iterations is small) OR ||

**d**

^{(i)}|| < ε

_{x}(the TR size is sufficiently reduced) OR |U

_{P}(

**x**

^{(i+1)}) − U

_{P}(

**x**

^{(i)})| < ε

_{U}(the change of the merit function value between iterations is minor). The factor Q

^{(i)}serves for adjusting the value of the model discretization level r

^{(i+1)}for the next algorithm iteration according to

^{–2}and α = 3 (as in Section 3), the model resolution starts to increase (relatively rapidly) two decades prior to convergence, which is beneficiary for computational efficiency.

^{(i)}< r

_{max}, then the termination condition is ignored. Consequently, for the next (supplemental) iteration, the model resolution is set to r

^{(i+1)}= r

_{max}and the TR size is set as

**d**

^{(i+1)}= M

_{d}

**d**

^{(i)}ε

_{x}/||

**d**

^{(i)}||, where the multiplier M

_{d}determines the increase in the TR size to ensure sufficient space for design tuning after shifting to the maximum resolution. Here, we adopt M

_{d}= 10.

_{FD}= max{r

_{min}, λr

^{(i)}}, which is lower than the current resolution used for simulation of the model outputs. The factor λ assumes positive values below 1; in our work, we set λ = 2/3.

#### 2.4. Miniaturization Framework

Algorithm 1: Operation of the proposed multi-fidelity size reduction algorithm. |

1. Set the iteration counter i = 0, and r^{(i)} = r_{min};2. Evaluate component response R(x^{(i)}) at the discretization level r^{(i)};3. Evaluate component sensitivities J_{R}(x^{(i)}) at the discretization level r_{FD};4. Construct a linear model ${L}_{}^{(i)}(x)=R({x}^{(i)})+{J}_{R}({x}^{(i)})\cdot (x-{x}^{(i)})$; 5. Obtain the design x^{(i+1)} by solving (4);6. Evaluate component response R(x^{(i+1)}) at the discretization level r^{(i)};7. Update trust-region size vector d^{(i)};8. If U_{P}(x^{(i+1)}) < U_{P}(x^{(i)}),compute r ^{(i+1)} using (6);Set i = i + 1; end9. If ||x^{(i+1)} – x^{(i)}|| < ε_{x} OR ||d^{(i)}|| < ε_{x} OR | U_{P}(x^{(i+1)}) – U_{P}(x^{(i)})| < ε_{U}if r^{(i)} < r_{max}Set r ^{(i)} = r_{max} and modify d(i); go to 3;elseGo to 10; endelseGo to 3; end10. END. |

_{min}and r

_{max}were decided upon through the grid convergence studies, as presented in Section 3. The maximum resolution level r

_{max}is the resolution increasing above, which leads to no meaningful changes of the component characteristics, whereas r

_{min}is assessed as the lowest resolution for which the evaluated responses outputs are still adequately rendered.

## 3. Results

_{max}.

## 4. Conclusions

^{2}(in comparison to 52, 275, 525 and 213 mm

^{2}of the initial design). It should be emphasized that size reduction of microwave components has become critical for a number of applications, including the Internet of Things. The proposed approach offers a design enhancement solution that is fast to execute, fully automated and complements traditional design methods (here, the initial development of compact circuit topology). These features make it an attractive tool, especially in an industrial context, but also in academic research.

## Author Contributions

## Funding

## Institutional Review Board Statement

## Informed Consent Statement

## Data Availability Statement

## Acknowledgments

## Conflicts of Interest

## References

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**Figure 1.**Operational flow of the proposed optimization-based miniaturization framework with multi-resolution EM simulations (one-headed arrows indicate the procedure flow, whereas two-headed arrows show where the procedure accesses the EM solver).

**Figure 2.**Verification structures: (

**a**) three-section impedance matching transformer: (top) compact microstrip resonant cell (CMRC), (bottom) geometry of the circuit using CMRCs (Circuit I) [54]; (

**b**) compact branch-line coupler (Circuit II) [55]; the numbers in circles show ports; (

**c**) branch-line coupler with microstrip cells (Circuit III) [56], (

**d**) compact branch-line coupler with unequal power division (Circuit IV) [57].

**Figure 3.**The dependence on the simulation time versus model resolution expressed using LPW: (

**a**–

**d**) Circuit I through IV, respectively; the low-fidelity model (- - -) and the high-fidelity model (—) are shown using vertical lines.

**Figure 4.**Circuit I: (

**a**) responses at the initial (A

_{0}= 52 mm

^{2}) (gray) and design optimized using the proposed algorithm (reduced size: A

_{opt}= 31 mm

^{2}) (black); the red horizontal line marks the design specifications; (

**b**) evolution of the circuit size throughout the optimization run.

**Figure 5.**Circuit II: (

**a**) responses at the initial (A

_{0}= 275 mm

^{2}) and design optimized using the proposed algorithm (reduced size: A

_{opt}= 205 mm

^{2}), indicated using gray and black, respectively; S-parameters marked as |S

_{11}| (—), |S

_{21}| (····), |S

_{31}| (- - -), |S

_{41}| (- .); the vertical line marks the circuit operating frequency; (

**b**) evolution of the circuit size throughout the optimization run.

**Figure 6.**Circuit III: (

**a**) responses at the initial (A

_{0}= 525 mm

^{2}) and design optimized using the proposed algorithm (reduced size: A

_{opt}= 409 mm

^{2}), indicated using gray and black, respectively; S-parameters marked as |S

_{11}| (—), |S

_{21}| (····), |S

_{31}| (- - -), |S

_{41}| (- .); the vertical line marks the circuit operating frequency; (

**b**) evolution of the circuit size throughout the optimization run.

**Figure 7.**Circuit IV: (

**a**) responses at the initial (A

_{0}= 213 mm

^{2}) and design optimized using the proposed algorithm (reduced size: A

_{opt}= 132 mm

^{2}), indicated using gray and black, respectively; S-parameters marked as |S

_{11}| (—), |S

_{21}| (····), |S

_{31}| (- - -), |S

_{41}| (- .); the vertical line marks the circuit operating frequency; (

**b**) evolution of the circuit size throughout the optimization run.

**Figure 8.**Footprint areas of the initial design (white rectangle, solid line), as well as the designs optimized using the proposed (white rectangle, dash-dotted line), and the basic TR routine (grey rectangle, solid line): (

**a**) Circuit I, (

**b**) Circuit II, (

**c**) Circuit III, and (

**d**) Circuit IV.

Parameter | Purpose | Default Value |
---|---|---|

r_{min} | Governing EM-model discretization level (minimum value) | Problem specific ^{1} |

r_{max} | Governing EM-model discretization level (maximum value) | Problem specific ^{1} |

M | Launching the discretization level increase | 10^{–2} |

α | Adjustment of EM-simulation model resolution | 3 |

λ | Setting discretization level for FD | 2/3 |

M_{d} | TR radius increase (near convergence) | 10 |

ε_{x}, ε_{U} | Algorithm termination | 10^{–3} |

^{1}Established through a visual inspection of the family of circuit responses.

Case Study | ||||
---|---|---|---|---|

Circuit I | Circuit II | Circuit III | Circuit IV | |

Substrate | RF-35 substrate (ε _{r} = 3.5, h = 0.762 mm) | RO4003 (ε _{r} = 3.38, h = 0.76 mm) | FR4 (ε _{r} = 4.4, h = 1.0 mm) | FR4 (ε _{r} = 4.4, h = 1.0 mm) |

Design parameters | x = [l_{1.1} l_{1.2} w_{1.1} w_{1.2} w_{1.0} l_{2.1} l_{2.2} w_{2.1} w_{2.2} w_{2.0} l_{3.1} l_{3.2} w_{3.1} w_{3.2} w_{3.0}]^{T} | x = [g l_{1r} l_{a} l_{b} w_{1} w_{2r} w_{3r} w_{4r} w_{a} w_{b}]^{T} | x = [G g_{1} g_{2} g_{3} w_{1} w_{3} L_{1} L_{2}]^{T} | x = [W w_{1r} w_{2r} w_{3} w_{4} L L_{1r} L_{2r} L_{3} L_{4} L_{5r} s]^{T} |

Other parameters | – | L = 2dL + L_{s}, L _{s} = 4w_{1} + 4g + s + l_{a} + l_{b}, W = 2dL + W _{s}, l_{1} = l_{b}_{l}1r, W_{s} = 4w_{1} + 4g + s + 2w_{a}, w _{2} = w_{a}w_{2r}, w_{3} = w_{3r}w_{a}, w _{4} = w_{4r}w_{a}, w_{c} = 1.9 mm | L = 4w_{1} + 10w_{3} + + 15g _{3} + 2L_{2}, W = 4w _{3} + 2L_{1} ++ G + 2g _{1} + 2g_{3} | w_{1} = w_{1r}w_{2}, w_{2} = w_{2r}(W-2w_{3}),l _{1} = L_{1r}(L–2s–2l_{4}), l _{2} = L_{2r}(L–l_{1})/2,L _{5}=L_{5r}(L–2(W_{0}–l_{4}/2)–mx), mx=|l_{4}−l_{3}|/2+(l_{4}+l_{3})/2 |

Operating parameters | F = [1.75 4.25] GHz | f_{0} = 1.5 GHz | f_{0} = 1.0 GHz | f_{0} = 2.0 GHz |

Design goals | ||||

F_{1} | Minimization of footprint area | |||

F_{2} | Minimization of matching |S _{11}| within bandwidth F | Minimization of matching |S _{11}| and isolation |S_{41}| at f_{0} | ||

F_{3} | – | Equal power split at f_{0}: |S _{31}| − |S_{21}| = 0 at f_{0} | Unequal power split at f_{0}: |S_{31}| − |S_{21}| = 3 dB at f_{0} | |

Objective function(cf. (3)) | ${U}_{P}(x)=A+{\beta}_{}{\left(\frac{\left|{S}_{11}\right|+20}{20}\right)}^{2}$ β = 300 | ${U}_{P}(x)=A+{\beta}_{1}{\left(\frac{\left|{S}_{11}\right|+20}{20}\right)}^{2}+{\beta}_{2}{\left(\frac{{d}_{s}-{d}_{s}{}_{\mathrm{max}}}{{d}_{s}{}_{\mathrm{max}}}\right)}^{2}$ | ||

β_{1} = 10,000, β_{2} = 30 | β_{1} = 1000, β_{2} = 30 | β_{1} = 10,000, β_{2} = 100 | ||

d_{s}_{max} = 0.1 | d_{s}_{max} = 0.1 | d_{s}_{max} = 3.0 | ||

Low-fidelity model | ||||

r_{min} | 14 | 16 | 15 | 16 |

Simulation time [s] ^{#} | 80.3 | 130.0 | 215.6 | 188.5 |

High-fidelity model | ||||

r_{max} | 28 | 30 | 28 | 26 |

Simulation time [s] ^{#} | 160.4 | 237.4 | 960.3 | 283.6 |

Time evaluation ratio | 2.0 | 1.8 | 4.5 | 1.5 |

Initial design | x^{(0)} = [3.58 0.19 0.79 0.38 0.3 3.75 0.24 0.33 0.39 1.46 3.9 0.18 0.23 0.28 1.0]^{T} | x^{(0)} = [0.59 0.7 6.7 8.3 0.84 0.91 0.72 0.13 3.3 0.63]^{T} | x^{(0)} = [1.0 1.0 0.6 0.25 2.4 0.25 9.0 3.75]^{T} | x^{(0)} = [15.0 0.63 0.93 3.45 3.0 12.4 0.42 0.81 1.50 1.0 0.9 0.5] ^{T} |

^{#}EM-simulations were performed on an Intel Xeon 2.1 GHz dual-core CPU with 128 GB RAM.

Circuit | Algorithm | Cost ^{1} | Cost Savings ^{2} | Footprint Area A [mm^{2}] ^{3} |
---|---|---|---|---|

I | Conventional TR search | 158 | – | 30.0 |

Multi-fidelity (this work) | 93 | 41.1 | 32.2 | |

II | Conventional TR search | 67 | – | 182.0 |

Multi-fidelity (this work) | 39 | 41.8 | 205.5 | |

III | Conventional TR search | 73 | – | 407.1 |

Multi-fidelity (this work) | 45 | 38.4 | 409.8 | |

IV | Conventional TR search | 152 | – | 143.1 |

Multi-fidelity (this work) | 87 | 50.3 | 131.9 |

^{1}Number of equivalent high-fidelity EM simulations.

^{2}Relative computational savings in percent with respect to the reference algorithm.

^{3}Obtained footprint area.

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**MDPI and ACS Style**

Pietrenko-Dabrowska, A.; Koziel, S.; Raef, A.G.
Reduced-Cost Optimization-Based Miniaturization of Microwave Passives by Multi-Resolution EM Simulations for Internet of Things and Space-Limited Applications. *Electronics* **2022**, *11*, 4094.
https://doi.org/10.3390/electronics11244094

**AMA Style**

Pietrenko-Dabrowska A, Koziel S, Raef AG.
Reduced-Cost Optimization-Based Miniaturization of Microwave Passives by Multi-Resolution EM Simulations for Internet of Things and Space-Limited Applications. *Electronics*. 2022; 11(24):4094.
https://doi.org/10.3390/electronics11244094

**Chicago/Turabian Style**

Pietrenko-Dabrowska, Anna, Slawomir Koziel, and Ali Ghaffarlouy Raef.
2022. "Reduced-Cost Optimization-Based Miniaturization of Microwave Passives by Multi-Resolution EM Simulations for Internet of Things and Space-Limited Applications" *Electronics* 11, no. 24: 4094.
https://doi.org/10.3390/electronics11244094