Next Article in Journal
Evaluation of Anticorrosion Coatings for Offshore Wind Turbine Monopiles for an Optimized and Time-Efficient Coating Application
Previous Article in Journal
The Cytotoxicity of OptiBond Solo Plus and Its Effect on Sulfur Enzymes Expression in Human Fibroblast Cell Line Hs27
Previous Article in Special Issue
Effects of Ambience on Thermal-Diffusion Type Ga-doping Process for ZnO Nanoparticles
 
 
Font Type:
Arial Georgia Verdana
Font Size:
Aa Aa Aa
Line Spacing:
Column Width:
Background:
Article

Electrical and Hysteresis Characteristics of Top-Gate InGaZnO Thin-Film Transistors with Oxygen Plasma Treatment Prior to TEOS Oxide Gate Dielectrics

1
Department of Materials Science and Engineering, National Yang Ming Chiao Tung University, Hsinchu 30010, Taiwan
2
Department of Electro-Optical Engineering, Minghsin University of Science and Technology, Hsinchu 30401, Taiwan
*
Author to whom correspondence should be addressed.
Coatings 2022, 12(3), 383; https://doi.org/10.3390/coatings12030383
Submission received: 27 January 2022 / Revised: 2 March 2022 / Accepted: 11 March 2022 / Published: 14 March 2022
(This article belongs to the Special Issue New Advances in Thin-Film Transistor)

Abstract

:
We report the impact of oxygen (O2) plasma time on an amorphous indium–gallium–zinc oxide (a-IGZO) thin-film surface that was carried out before TEOS deposition in order to optimize the performance of thin-film transistors (TFTs). TheO2 plasma time of 60 s possessed the largest on/off current ratio of >108, with a field-effect mobility (µFE) of 8.14 cm2 V−1 s−1, and the lowest subthreshold swing (S.S.) of 0.395 V/decade, with a threshold voltage (Vth) of −0.14 V. However, increases in Ioff and S.S. and decreases in the µFE were observed for the longer O2 plasma time of 120 s. As the O2 plasma time increased, the reduction in the carrier concentration in the IGZO channel layer may have resulted in an increase in Vth for the IGZO TFT devices. With an increase in the O2 plasma time, the surface roughness of the IGZO channel layer was increased, the carbon content in the TEOS oxide film was reduced, and the film stoichiometry was improved. The SIMS depth profile results showed that the O/Si ratio of TEOS oxide for the sample with the O2 plasma time of 60 s was 2.64, and its IGZO TFT device had the best electrical characteristics. In addition, in comparison to the IGZO TFT device without O2 annealing, larger clockwise hysteresis in the transfer characteristics revealed that a greater number of electrons were trapped at the interface between TEOS oxide and the a-IGZO channel layer. However, hysteresis curves of the O2-annealed IGZO TFTs with various O2 plasma times were greatly reduced, meaning that the electron traps were reduced by O2 annealing.

1. Introduction

Due to fast advances in optoelectronic technology, the next generation of displays will have thinner, lighter, and bigger screens. High-performance thin-film transistors (TFTs) have received a lot of interest [1,2,3,4,5,6]. Because of their great field-effect mobility (μFE) (>10 cm2 V−1 s−1) and lower processing temperatures, amorphous oxide semiconductors (AOSs) are suitable for TFT channel materials [7,8] and make it possible to drive TFTs in active-matrix organic light-emitting diode (AMOLED) displays. For amorphous indium–gallium–zinc oxide (a-IGZO) TFTs, the traditional bottom gate structure has been researched extensively [9,10] in our previous studies. However, due to large parasitic capacitance and low scalability, this structure is inappropriate to integrate into the system peripheral circuits on the glass and implement superior AMOLED displays. As a result, self-aligned top-gate a-IGZO TFTs devices with high performance and good stability are required for AMOLED display applications [11,12].
In general, the electrical properties of a-IGZO TFTs, including Vth, subthreshold swing (S.S.), μFE, and Ion/Ioff current ratio, can clearly be controlled by varying the partial pressure of oxygen (O2) during a-IGZO channel layer deposition with radio frequency sputtering [9,13]. Jeong et al. [14] reported that O2 plasma treatment on the a-IGZO channel layer decreases the oxygen vacancy density of the IGZO films at low processing temperatures, improving the IGZO channel layer material and the performance of IGZO TFT devices. Pu et al. reported [15] the effects of O2 plasma treatment on solution-processed a-IGZO TFTs. The plasma-treated devices not only showed greater mobility and a greater on/off current ratio, but also a monotonic increase in the SS. with the plasma time. The effects of several plasma treatments on a-IGZO TFTs, including O2, nitrogen (N2), and argon (Ar), were observed [16] by Kim et al. They used X-ray photoelectron spectroscopy (XPS) to investigate oxygen stoichiometry in a-IGZO TFTs in diverse plasma conditions. The results indicated that O2 and N2 plasmas decreased oxygen vacancies, but Ar plasma treatment increased them. Liu et al. recently reported [17] on IGZO thin films that were treated with an Ar/O2 plasma combination with various oxygen content ratios, resulting in the bottom-gate IGZO TFTs have improved device operation characteristics. Wang et al. reported [18] the O2 plasma treatment on gate dielectrics (Al2Ox) for a-IGZO TFTs and demonstrated that O2 plasma treatment can improve the gate dielectric performance. The results were ascribed to passivating the interfacial and bulk traps by reducing the oxygen vacancies. Most notably, this was the first study to our knowledge that focused on the effects of the O2 plasma treatment prior to the tetraethyl–orthosilicate (TEOS) oxide gate dielectric deposition and O2 annealing on the electrical characteristics of top-gate IGZO TFTs, wherein the compositions of TEOS oxide interfaces with a-IGZO films were reported.
In this study, top-gate IGZO TFT devices with various O2 plasma times prior to TEOS gate dielectric and O2 annealing after TEOS oxide deposition were fabricated using the same plasma-enhanced chemical vapor deposition (PECVD) system. Moreover, the electrical and hysteresis characteristics of the IGZO TFT devices using O2 annealing after TEOS oxide deposition were evaluated. Additionally, atomic force microscope (AFM) and X-ray photoelectron spectroscopy (XPS) tests were performed to investigate the surface morphologies and compositions of the IGZO films. A depth profile analysis of the secondary ion mass spectrometer (SIMS) was conducted to verify the compositions of TEOS oxide interface with a-IGZO films treated by different O2 plasma times. The best μFE of 8.14 cm2 V−1s−1, S.S. of 0.395 V/decade, Vth of −0.14 V, and lower ∆Vth of 0.5 V from the hysteresis curve were obtained in the IGZO TFTs that had been subjected to O2 plasma treatment for 60 s and O2 annealing.

2. Experimental Methods

The cross-sectional schematic of the top-gate IGZO TFT structure employed in this investigation is shown in Figure 1a. Details of the devices’ fabricating processes can be found elsewhere [19]. The O2 plasma time was varied in order to verify the effects of O2 plasma prior to depositing the TEOS gate dielectric on the electrical and hysteresis characteristics of the IGZO TFT devices. The O2 plasma treatment was performed at various treatment times using an Oxford PECVD system prior to depositing TEOS oxide at 350 °C at a fixed deposition power of 40 W. The system working pressure was 700 m Torr with an O2 flow of 250 sccm. After TEOS oxide deposition, the samples were annealed at 400 °C at a working pressure of 5 mTorr in an O2 ambient atmosphere of 40 sccm for 1 h in the same PECVD system. Figure 1b summarizes the process charts for each step of the top-gate IGZO TFTs employed in this investigation. For the IDS-VGS transfer characteristics and IGS-VGS, VGS varied from −15 V to +15 V in 0.3 V steps for VDS = 0.1 V in the tested devices. The Agilent 4156A precision semiconductor parameter analyzer was employed to thoroughly evaluate and compare the electrical and hysteresis characteristics of the tested devices, and the measurement temperature was maintained at 25 °C.
In this experiment, the channel width W = 100 µm and the channel length L = 5 µm were used. Figure 1a shows the source and drain offsets, which were designed at 1 µm. The µFE was calculated using the following equation:
μ F E = L × G m ( m a x ) W × C o x × V D S
where Cox is the TEOS oxide capacitance per unit area and the maximum transconductance Gm(max) = ( IDS/ VGS)max at VDS = 0.1 V. The S.S. was taken as the value of (dlog (IDS)/d VGS)−1 when the IDS was in the range of 10−10–10−9 A.
Film thickness was examined and fitted using the spectroscopic ellipsometer (SE) (M-2000U) and CompleteEASE software (J. A. Woollam Co., Inc., Lincoln County, NE, United States), respectively. Surface morphology tests were employed using an atomic force microscope (AFM, Veeco Dimension 3100) at a scan area of 2 × 2 μm. X-ray photoelectron spectroscopy (XPS, Thermo Fisher Scientific Theta Probe (Waltham, MA, USA)) was also employed to characterize the composition of the IGZO films. The depth profile analysis of the secondary ion mass spectrometer (SIMS, CAMECA IMS 7F) was conducted to verify the compositions of the TEOS oxide interface with a-IGZO films treated with O2 plasma. In order to compare the effect of O2 annealing, we prepared the TEOS oxide on the a-IGZO film without O2 annealing with an O2 plasma time of 60 s to determine the hysteresis characteristics.

3. Results and Discussion

3.1. Surface Roughness Analysis of a-IGZO Films at Various O2 Plasma Times

Figure 2a–c compares the AFM surface morphology characterizations of the a-IGZO channel layers with different O2 plasma times, and their z range, root mean square (RMS), and average roughness (Ra) are summarized in Table 1. Plasma bombardment of the channel surface is generally believed to increase surface roughness, as shown in Figure 2. Although the RMS and Ra roughness monotonically increased with the increase in the O2 plasma time, the z range of the a-IGZO films with the O2 plasma times of 0 and 60 s was lower than that of the O2 plasma time of 120 s. The deteriorated electrical properties of the IGZO TFTs were found to be reasonably useful for ascribing the cause of the longer O2 plasma time to the surface roughness in a later section following the presentation of results of the device characteristic analysis.

3.2. Electrical Characteristics of IGZO TFTs at Various O2 Plasma Times

Figure 3 shows the typical IDS-VGS transfer characteristics and IGS-VGS curves of the IGZO TFTs at various O2 plasma times prior to the deposition of the TEOS oxide gate dielectrics. Vth is set as the gate voltage (VGS) when the drain current (IDS) is at a constant value (10−9 × (W/L) A). Measurements were performed with more than three samples per device. The measured capacitance per unit area (Cox) of the gate dielectric was 4.98 × 10−8 F/cm2 in this study. Table 2 shows the average values and standard variations in the electrical parameters extracted from the IGZO TFTs at various O2 plasma times. It is clearly confirmed in Figure 3 that the transfer curves shifted positively as the O2 plasma time increased as a result of the lower on-current (Ion) and higher off-current (Ioff) within the IGZO TFT channel. In addition, a compliance cut-off phenomenon that was clearly visible in the transfer curves at the O2 plasma times of 60 and 120 s was attributed to a higher total resistance between the source and drain electrodes as the O2 plasma time increased. Moreover, the gate leakage current (IGS) gradually increased from 10−13 to 10−12 A, which occurred as the O2 plasma time increased. As shown in Table 1, the a-IGZO film’s roughness monotonically increased as the O2 plasma time increased; therefore, the gate leakage current (IGS) of the IGZO TFTs gradually increased by one order of magnitude from when the TEOS gate oxide was deposited after the O2 plasma treatment. From the summary in Table 2, we determined that the O2 plasma time of 60 s possessed the largest on/off current ratio of >108, a µFE of 8.14 cm2 V−1 s−1, and the lowest S.S. slope of 0.395 V/decade and a Vth of −0.14 V. However, increases in Ioff and S.S. and degradation in µFE were observed at the longer O2 plasma time of 120 s. It is reasonable to ascribe higher Ioff and S.S. deterioration to the higher surface roughness of the a-IGZO films after an O2 plasma time of 120 s, as shown in Figure 2. The effects of the various O2 plasma times and O2 annealing on the hysteresis characteristics are discussed below.
Figure 4 shows the typical output characteristics of the IGZO TFTs at various O2 plasma times under different gate overdrives: VGS-Vth = 3–11 V. It can be seen that the saturation current at the same gate overdrive clearly decreased as the O2 plasma time increased. All of the devices demonstrated ohmic behavior, indicating good contact between the a-IGZO channels and Mo electrodes. In a linear current model of a conventional metal oxide semiconductor field-effect transistor (MOSFET), the resistivity (ρ) is expressed by the following equation [16,20]:
ρ = V D S I D S W t L     1 μ F E C o x ( V G S V t h )     1 n q μ F E
where Cox is the oxide capacitance per unit area; n is the charge carrier concentration (cm3); q is the electron unit charge; W, L, and t are the width, length, and thickness of the channel, respectively; and VDS is the drain-source voltage. It should be noted that ρ is primarily associated with Vth, and its corresponding n is determined according to Equation (2). Table 2 indicates that ρ gradually increased from 6.26 to 8.26 Ω·cm as the O2 plasma treatment time increased at VDS = 2.5 V and VGS-Vth = 11 V. Accordingly, the O2 plasma treatment mainly affected the changes in n in the channel, and n was reduced by exposure to the O2 plasma since it has already been demonstrated that oxygen atoms can fill oxygen vacancies after O2 treatments in metal oxide-based semiconductors [15,16,21]. In addition, it is clearly confirmed in Figure 3 that the transfer curves shifted positively as the O2 plasma time increased. Details of the changes in the carrier concentrations are presented in a later section and are based on the results of the XPS analysis.
The chemical characteristics of the a-IGZO channel layers treated with different O2 plasma times were investigted by analyzing the XPS results. The effect of the O2 plasma time on oxygen scarcity after plasma processing was studied extensively by compaing and analyzing from the O1s XPS data displayed in Figure 5. Figure 5a–c shows the XPS spectra of the O1s peak of the a-IGZO films with the O2 plasma times of 0, 60, and 120 s, respectively. Generally, for IGZO TFTs, the O1s spectra are composed of double Gaussian distributions, the OI peak is observed at 530.2 eV and the OII peak is observed 531.6 eV [15,16,22,23]. The OI XPS signal peak shows covalent oxygen ion bonds with In, Ga, and Zn cations: and the OII XPS signal peak represents oxygen scarcities in the IGZO film. As a result, the integrated peak ratio of the OII/(OI+OII) intensity ratio of the O1s core levels of the a-IGZO channel layer was employed to estimate the quality of the channel layer and the number of oxygen scarcities in the a-IGZO channel layer with O2 plasma treatment. The estimated XPS OII/(OI+OII) intensity ratios for the a-IGZO channel layer with increased O2 plasma times of 0, 60, and 120 s were 0.44, 0.32, and 0.21, respectively. When O2 plasma treatment was performed for a longer time, the low OII/(OI+OII) XPS intensity ratios indicated a significant reduction in the oxygen scarcities and greater quality of the IGZO channel layer. Because oxygen vacancies are important for electron donation in the a-IGZO channel layer, the decreased OII peak intensity shown in the XPS analyses corresponded well with the reduced carrier concentration, which could be ascribed to a higher resistivity as a result of the increased O2 plasma time, as shown in Table 2. Therefore, as the O2 plasma time increased, the reduced carrier concentration in the IGZO channel layer may have resulted in an increase in the threshold voltage (Vth) of the IGZO TFT devices [13,17,24].
For the analysis of the SIMS depth profile results, we fabricated test samples with a 50 nm thick Mo/100 nm thick TEOS oxide/40 nm thick a-IGZO structure on silicon substrates that were the same as the structure of the top-gate IGZO TFT devices. First, the a-IGZO film was deposited on the silicon substrate, and then, it was subjected to O2 plasma treatment on the a-IGZO film prior to the depositing of the TEOS oxide and O2 annealing after TEOS oxide deposition in the same PECVD system. The SIMS analysis is able to observe information on the impurity content and compositions of the TEOS oxide interface with a-IGZO films treated with O2 plasma. The area located 100–150 nm from the sample’s surface was found to be related to the area across the TEOS oxide near the a-IGZO films. Figure 6a–c shows the SIMS depth profiles of the Mo, Si, O, C, In, Ga, and Zn elements for the test samples at various O2 plasma times. From analyzing the element intensities, we found that the ratios of the elements Mo, In, Ga, and Zn remained essentially unchangeable for these three samples. Figure 6a shows that the TEOS oxide film on the sample without O2 plasma treatment contained more carbon (3.91%) than the others. Because the TEOS oxide film reaction provided intermediate elements, such as the carbon impurity in the film caused by the inadequate dissociation of TEOS oxide, the carbon dissociation inside the TEOS oxide films of the O2 plasma-treated samples was enhanced. With the increased O2 plasma times of 60 and 120 s, the ratio of the carbon content in the TEOS oxide film decreased from 3.91% to the ratios of 2.42% and 2.71%, respectively, as shown in Figure 6a–c. Rhee et al. reported that the use of oxygen gas plasma treatment during TEOS oxide gate dielectric deposition was efficient in removing the impurities and in the densification of the film. The carbon impurity was reduced by cyclic O2 plasma treatment [25]. Since TEOS oxide is affected by O2 plasma treatment, the Si and O contents of the TEOS oxide film clearly changed as the O2 plasma time increased. The O/Si ratios of TEOS oxide gradually increased from 1.15 to the ratios of 2.64 and 3.54 with increased O2 plasma times of 60 and 120 s, respectively, as shown in Table 3. This is because the impurities on the surface of the a-IGZO channel layer were mainly removed after O2 plasma time of 60 s and because the low amount of O2+ in the plasma has a tendency to catch electrons from shallow areas [15]. Therefore, applying the O2 plasma treatment before gate dielectric deposition would affect the composition of the gate dielectric. In addition, increasing the O2 plasma time to 120 s may allow the O2+ accumulating on the surface to provide more oxygen atoms for TEOS gate dielectrics. In this experiment, we observed that the O/Si ratio of TEOS oxide of the sample with the O2 plasma time of 60 s was 2.64, and its IGZO TFT device had the best electrical characteristics.
Because the conduction channel layer is mainly formed in a very thin layer near the interface, the electrical properties of a TFT are determined by the interface roughness between the a-IGZO and the TEOS oxide gate dielectric. The existence of defect states that may lead to electron trapping primarily affects the S.S. and µFE of the a-IGZO channel layer [26,27].
For the sample with an O2 plasma time 60 s, a slight increase in the surface roughness of the a-IGZO channel layer was observed based on the AFM morphology, but the impurities on the surface of the a-IGZO channel layer were largely removed. In this case, the reaction of atomic oxygen and oxygen vacancies in the channel layer increased the µFE of the IGZO TFTs. Reductions in the oxygen vacancies and carbon content by the XPS and SIMS analyses, respectively, were observed. It has been reported that filling oxygen vacancies can enhance µFE because interface traps can act as scattering centers [28]. Similarly, the interfacial roughness of the sample with an O2 plasma time of 120 s increased three times, leading to enhanced carrier scattering and thus reduced fieled effect mobility. In addition, the accumulation of O2+ on the surface might clog the micropores and prevent the atoms from reaching deep into the channel layer as the O2 plasma time increases, resulting in large interfacial traps and degraded S.S. [15].

3.3. Effect of O2 Annealing on Hysteresis Characteristics of IGZO TFTs at Various O2 Plasma Times

We investigated the hysteresis sweeps of the IGZO TFTs at various O2 plasma times prior to TEOS oxide deposition, thus studying the impacts of O2 annealing following TEOS oxide deposition and their interaction with the a-IGZO channel layer. Figure 7a–c shows the hysteresis curves of the IGZO TFTs at the O2 plasma times of 0, 60, and 120 s, respectively, with O2 annealing being represented as VGS ranging from −15 V to +15 V. The hysteresis curve of the IGZO TFT with the O2 plasma time of 60 s without O2 annealing and represented as VGS ranging from −15 V to +15 V is shown in comparison with the effect of O2 annealing in Figure 7d. Figure 7 shows that the on-current appeared to be rather constant in the saturation region due to a compliance cut-off phenomenon, which was attributed to a higher total resistance between the source and drain electrodes after the O2 plasma treatment. In the lower threshold voltage shifts (∆Vth = 0.34, 0.5, and 0.51 V) estimated from the individual hysteresis curves shown in Figure 7a–c with O2 annealing after TEOS oxide deposition, a small number of electrons were trapped at or close to the interface of the TEOS oxide/a-IGZO channel layer [19]. The largest threshold voltage shift (∆Vth = 3.05 V) from the hysteresis curve without O2 annealing revealed that a greater number of electrons were trapped at the interface between TEOS oxide and the a-IGZO channel layer. However, the lower ∆Vth from the hysteresis curves displayed in Figure 7a–c shows that O2 annealing after TEOS oxide deposition successfully limited the formation in interface traps and charge trapping between the TEOS oxide gate dielectrics and the IGZO channel layer. It has been already shown that the a-IGZO channel regions were patterned and thermally annealed in the O2 atmosphere or in air, and the hysteresis disappeared for the annealed bottom-gate IGZO TFTs, which suggests that thermal annealing reduces electron traps [29,30].

4. Conclusions

In this study, O2 plasma treatment was found to increase the surface roughness of the IGZO channel layer. The O2 plasma time of 60 s possessed the largest on/off current ratio of >108, with a μFE of 8.14 cm2 V−1 s−1, and the lowest S.S. slope of 0.395 V/decade, with a Vth of −0.14 V. However, increases in Ioff and S.S. and degradation in µFE were observed for the longer O2 plasma time of 120 s. It is reasonable to ascribe the higher Ioff and deteriorated S.S. to the higher surface roughness of the a-IGZO channel layer for a longer O2 plasma time of 120 s. The XPS observations of the OII peak intensity coincided well with the lower carrier concentration due to larger resistivity with the increasing O2 plasma time. Therefore, the decrease in the carrier concentration of the IGZO channel layer may lead to an increase in Vth of the IGZO TFT device with the increasing O2 plasma time. As the O2 plasma time increased, the carbon content in the TEOS oxide film was reduced, and the film stoichiometry was improved. From the SIMS depth profile results, we found that the O/Si ratio of the TEOS oxide for the sample with the O2 plasma time of 60 s was 2.64, and its IGZO TFT device had the best electrical characteristics. In addition, compared to the IGZO TFT device without O2 annealing, more electrons were trapped at the interface between the TEOS oxide and the a-IGZO channel layer, as shown by a significant clockwise hysteresis in the transfer characteristics. However, the hysteresis curves of the O2-annealed IGZO TFTs with various O2 plasma times were greatly diminished, meaning that the electron traps were reduced by O2 annealing.

Author Contributions

Conceptualization, T.-C.T., Y.-S.L. and T.-E.H.; methodology, T.-C.T. and Y.-S.L.; software, T.-C.T.; data curation, Y.-H.W.; writing—original draft preparation, Y.-S.L. and T.-C.T.; writing—review and editing, Y.-S.L., Y.-H.W., T.-C.T., T.-E.H. and M.-L.L. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded by the Ministry of Science Technology Project (MOST 110-2637-E-159-004-).

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

The data presented in this study are available on request from the corresponding author.

Acknowledgments

The authors thank the National Yang Ming Chiao Tung University Nano Facility Center (NFC) for supplying the RF Magnetron Sputter and ICP systems and the Taiwan Semiconductor Research Institute (TSRI) for supplying the PECVD system.

Conflicts of Interest

The authors declare no conflict of interest.

References

  1. Baek, G.; Bie, L.; Abe, K.; Kumomi, H.; Kanicki, J. Electrical Instability of Double-Gate a-IGZO TFTs With Metal Source/Drain Recessed Electrodes. IEEE Trans. Electron Devices 2014, 61, 1109–1115. [Google Scholar] [CrossRef]
  2. Cao, Q.; Kim, H.S.; Pimparkar, N.; Kulkarni, J.P.; Wang, C.; Shim, M.; Roy, K.; Alam, M.A.; Rogers, J.A. Medium-scale carbon nanotube thin-film integrated circuits on flexible plastic substrates. Nature 2008, 454, 495–500. [Google Scholar] [CrossRef] [PubMed]
  3. Lin, C.-L.; Chang, W.-Y.; Hung, C.-C. Compensating Pixel Circuit Driving AMOLED Display With a-IGZO TFTs. IEEE Electron Device Lett. 2013, 34, 1166–1168. [Google Scholar] [CrossRef]
  4. Seok, M.J.; Choi, M.H.; Mativenga, M.; Geng, D.; Kim, D.Y.; Jang, J. A Full-Swing a-IGZO TFT-Based Inverter with a Top-Gate-Bias-Induced Depletion Load. IEEE Electron Device Lett. 2011, 32, 1089–1091. [Google Scholar] [CrossRef]
  5. Kang, D.H.; Kang, I.; Ryu, S.H.; Jang, J. Self-Aligned Coplanar a-IGZO TFTs and Application to High-Speed Circuits. IEEE Electron Device Lett. 2011, 32, 1385–1387. [Google Scholar] [CrossRef]
  6. Arias, A.C.; MacKenzie, J.D.; McCulloch, I.; Rivnay, J.; Salleo, A. Materials and applications for large area electronics: Solution-based approaches. Chem. Rev. 2010, 110, 3–24. [Google Scholar] [CrossRef] [PubMed]
  7. Nomura, K.; Ohta, H.; Takagi, A.; Kamiya, T.; Hirano, M.; Hosono, H. Room-temperature fabrication of transparent flexible thin-film transistors using amorphous oxide semiconductors. Nature 2004, 432, 488–492. [Google Scholar] [CrossRef]
  8. Hosono, H. Ionic amorphous oxide semiconductors: Material design, carrier transport, and device application. J. Non-Cryst. Solids 2006, 352, 851–858. [Google Scholar] [CrossRef]
  9. Lee, Y.-S.; Yen, T.-W.; Lin, C.-I.; Lin, H.-C.; Yeh, Y. Electrical characteristics of amorphous In–Ga–Zn–O thin-film transistors prepared by radio frequency magnetron sputtering with varying oxygen flows. Displays 2014, 35, 165–170. [Google Scholar] [CrossRef]
  10. Lee, Y.-S.; Fan, S.-K.; Chen, C.-W.; Yen, T.-W.; Lin, H.-C. Temperature instability of amorphous In-Ga-Zn-O thin film transistors. In Proceedings of the 2013 6th IEEE/International Conference on Advanced Infocomm Technology (ICAIT), Hsinchu, Taiwan, 6–9 July 2013. [Google Scholar]
  11. Park, J.; Song, I.; Kim, S.; Kim, S.; Kim, C.; Lee, J.; Lee, H.; Lee, E.; Yin, H.; Kim, K.-K.; et al. Self-aligned top-gate amorphous gallium indium zinc oxide thin film transistors. Appl. Phys. Lett. 2008, 93, 53501. [Google Scholar] [CrossRef]
  12. Chen, R.; Zhou, W.; Zhang, M.; Wong, M.; Kwok, H.S. Self-aligned top-gate InGaZnO thin film transistors using SiO2/Al2O3 stack gate dielectric. Thin. Solid Film. 2013, 548, 572–575. [Google Scholar] [CrossRef]
  13. Ahn, J.S.; Lee, K.B. Control of the threshold voltage by using the oxygen partial pressure in sputter-deposited InGaZnO4 thin-film transistors. J. Korean Phys. Soc. 2012, 60, 1625–1628. [Google Scholar] [CrossRef]
  14. Jeong, J.K. The status and perspectives of metal oxide thin-film transistors for active matrix flexible displays. Semicond. Sci. Technol. 2011, 26, 34008. [Google Scholar] [CrossRef]
  15. Pu, H.; Zhou, Q.; Yue, L.; Zhang, Q. Investigation of oxygen plasma treatment on the device performance of solution-processed a-IGZO thin film transistors. Appl. Surf. Sci. 2013, 283, 722–726. [Google Scholar] [CrossRef]
  16. Kim, J.-S.; Joo, M.-K.; Xing Piao, M.; Ahn, S.-E.; Choi, Y.-H.; Jang, H.-K.; Kim, G.-T. Plasma treatment effect on charge carrier concentrations and surface traps in a-InGaZnO thin-film transistors. J. Appl. Phys. 2014, 115, 114503. [Google Scholar] [CrossRef]
  17. Liu, W.-S.; Hsu, C.-H.; Jiang, Y.; Lai, Y.-C.; Kuo, H.-C. Improvement of device characteristics of plasma-treated indium gallium zinc oxide thin-film transistors through thermal annealing. Semicond. Sci. Technol. 2021, 36, 45007. [Google Scholar] [CrossRef]
  18. Wang, H.; Xu, W.; Zhou, S.; Xie, F.; Xiao, Y.; Ye, L.; Chen, J.; Xu, J. Oxygen plasma assisted high performance solution-processed Al2Ox gate insulator for combustion-processed InGaZnOx thin film transistors. J. Appl. Phys. 2015, 117, 35703. [Google Scholar] [CrossRef]
  19. Lee, Y.-S.; Wang, Y.-H.; Tien, T.-C.; Hsieh, T.-E.; Lai, C.-H. Electrical Characteristics and Stability Improvement of Top-Gate In-Ga-Zn-O Thin-Film Transistors with Al2O3/TEOS Oxide Gate Dielectrics. Coatings 2020, 10, 1146. [Google Scholar] [CrossRef]
  20. Dimitrijev, S. Principle of Semiconductor Devices, 2nd ed.; Oxford University Press: New York, NY, USA, 2006. [Google Scholar]
  21. Park, J.-W.; Baik, H.-K.; Lim, T.; Ju, S. Threshold voltage control of oxide nanowire transistors using nitrogen plasma treatment. Appl. Phys. Lett. 2010, 97, 203508. [Google Scholar] [CrossRef]
  22. Liu, P.; Chen, T.P.; Liu, Z.; Tan, C.S.; Leong, K.C. Effect of O2 plasma immersion on electrical properties and transistor performance of indium gallium zinc oxide thin films. Thin Solid Film. 2013, 545, 533–536. [Google Scholar] [CrossRef]
  23. Kim, J.; Bang, S.; Lee, S.; Shin, S.; Park, J.; Seo, H.; Jeon, H. A study on H2 plasma treatment effect on a-IGZO thin film transistor. J. Mater. Res. 2012, 27, 2318–2325. [Google Scholar] [CrossRef] [Green Version]
  24. Liu, W.-S.; Hsu, C.-H.; Jiang, Y.; Lai, Y.-C.; Kuo, H.-C. Improving Device Characteristics of Dual-Gate IGZO Thin-Film Transistors with Ar–O2 Mixed Plasma Treatment and Rapid Thermal Annealing. Membranes 2022, 12, 49. [Google Scholar] [CrossRef]
  25. Yi, C.; Rhee, S.W. Cyclic plasma deposition of SiO2 films at low temperature (80 °C) with intermediate plasma treatment. J. Vac. Sci. Technol. A Vac. Surf. Film. 2002, 20, 398–402. [Google Scholar] [CrossRef]
  26. Nomura, K.; Kamiya, T.; Ohta, H.; Hirano, M.; Hosono, H. Defect passivation and homogenization of amorphous oxide thin-film transistor by wet O2 annealing. Appl. Phys. Lett. 2008, 93, 192107. [Google Scholar] [CrossRef]
  27. Chung, W.-F.; Chang, T.-C.; Li, H.-W.; Chen, C.-W.; Chen, Y.-C.; Chen, S.-C.; Tseng, T.-Y.; Tai, Y.-H. Influence of H2O Dipole on Subthreshold Swing of Amorphous Indium–Gallium–Zinc-Oxide Thin Film Transistors. Electrochem. Solid-State Lett. 2011, 14, H114–H116. [Google Scholar] [CrossRef]
  28. Nayak, P.K.; Hedhili, M.N.; Cha, D.; Alshareef, H.N. High performance solution-deposited amorphous indium gallium zinc oxide thin film transistors by oxygen plasma treatment. Appl. Phys. Lett. 2012, 100, 202106. [Google Scholar] [CrossRef] [Green Version]
  29. Nomura, K.; Kamiya, T.; Kikuchi, Y.; Hirano, M.; Hosono, H. Comprehensive studies on the stabilities of a-In-Ga-Zn-O based thin film transistor by constant current stress. Thin Solid Film. 2010, 518, 3012–3016. [Google Scholar] [CrossRef]
  30. Kimura, M.; Nakanishi, T.; Nomura, K.; Kamiya, T.; Hosono, H. Trap densities in amorphous-InGaZnO4 thin-film transistors. Appl. Phys. Lett. 2008, 92, 133512. [Google Scholar] [CrossRef]
Figure 1. (a) Cross-sectional diagram of a top-gate IGZO thin-film transistor (TFT) structure. (b) Process charts of the top-gate IGZO TFTs used in this study.
Figure 1. (a) Cross-sectional diagram of a top-gate IGZO thin-film transistor (TFT) structure. (b) Process charts of the top-gate IGZO TFTs used in this study.
Coatings 12 00383 g001
Figure 2. AFM surface morphology characterization of the a-IGZO films at the O2 plasma times of (a) 0, (b) 60, and (c) 120 s.
Figure 2. AFM surface morphology characterization of the a-IGZO films at the O2 plasma times of (a) 0, (b) 60, and (c) 120 s.
Coatings 12 00383 g002
Figure 3. IDS-VGS transfer characteristics and IGS-VGS of IGZO TFTs with O2 plasma times of 0, 60, and 120 s.
Figure 3. IDS-VGS transfer characteristics and IGS-VGS of IGZO TFTs with O2 plasma times of 0, 60, and 120 s.
Coatings 12 00383 g003
Figure 4. Output characteristics IDS-VDS of IGZO TFTs at O2 plasma times of (a) 0, (b) 60, and (c) 120 s.
Figure 4. Output characteristics IDS-VDS of IGZO TFTs at O2 plasma times of (a) 0, (b) 60, and (c) 120 s.
Coatings 12 00383 g004
Figure 5. XPS spectra of a-IGZO thin films at the O2 plasma times of (a) 0, (b) 60, and (c) 120 s.
Figure 5. XPS spectra of a-IGZO thin films at the O2 plasma times of (a) 0, (b) 60, and (c) 120 s.
Coatings 12 00383 g005
Figure 6. SIMS depth profiles for Si, O, and C of the test samples at the O2 plasma times of (a) 0, (b) 60, and (c) 120 s with O2 annealing.
Figure 6. SIMS depth profiles for Si, O, and C of the test samples at the O2 plasma times of (a) 0, (b) 60, and (c) 120 s with O2 annealing.
Coatings 12 00383 g006aCoatings 12 00383 g006b
Figure 7. Hysteresis curves of IGZO TFTs at the O2 plasma times of (a) 0, (b) 60, and (c) 120 s; (d) O2 plasma time of 60 s, without O2 annealing.
Figure 7. Hysteresis curves of IGZO TFTs at the O2 plasma times of (a) 0, (b) 60, and (c) 120 s; (d) O2 plasma time of 60 s, without O2 annealing.
Coatings 12 00383 g007aCoatings 12 00383 g007b
Table 1. Z range, root mean square (RMS) roughness, and average roughness (Ra) of the a-IGZO films at various O2 plasma times.
Table 1. Z range, root mean square (RMS) roughness, and average roughness (Ra) of the a-IGZO films at various O2 plasma times.
O2 Plasma Time (s)Z Range (nm)RMS (nm)Ra (nm)
0 8.3290.6710.458
60 7.8771.0490.817
120 11.141.8571.531
Table 2. Electrical parameters extracted from the IGZO TFTs at various O2 plasma times.
Table 2. Electrical parameters extracted from the IGZO TFTs at various O2 plasma times.
O2 Plasma Time (s)Vth (V)S.S. (V/Decade)μFE (cm2 V−1s−1)Ion (A)Ioff (A)ρ2.5V (Ω·cm)
0−5.74 ± 0.311.045 ± 0.0361.95 ± 0.312.4 × 10−63.0 × 10−146.26
60−0.14 ± 0.080.395 ± 0.0318.14 ± 0.861.3 × 10−61.1 × 10−147.64
1205.14 ± 0.512.210 ± 0.2042.98 ± 0.311.3 × 10−64.4 × 10−128.26
Table 3. SIMS analytical results for the Si, O, C, and O/Si ratio of the test samples at various O2 plasma times.
Table 3. SIMS analytical results for the Si, O, C, and O/Si ratio of the test samples at various O2 plasma times.
O2 Plasma Time (s)Si (%)O (%)C (%)O/Si
044.6651.413.911.15
6026.7770.802.422.64
12021.4075.882.713.54
Publisher’s Note: MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Share and Cite

MDPI and ACS Style

Tien, T.-C.; Hsieh, T.-E.; Lee, Y.-S.; Wang, Y.-H.; Lee, M.-L. Electrical and Hysteresis Characteristics of Top-Gate InGaZnO Thin-Film Transistors with Oxygen Plasma Treatment Prior to TEOS Oxide Gate Dielectrics. Coatings 2022, 12, 383. https://doi.org/10.3390/coatings12030383

AMA Style

Tien T-C, Hsieh T-E, Lee Y-S, Wang Y-H, Lee M-L. Electrical and Hysteresis Characteristics of Top-Gate InGaZnO Thin-Film Transistors with Oxygen Plasma Treatment Prior to TEOS Oxide Gate Dielectrics. Coatings. 2022; 12(3):383. https://doi.org/10.3390/coatings12030383

Chicago/Turabian Style

Tien, Tsung-Cheng, Tsung-Eong Hsieh, Yih-Shing Lee, Yu-Hsin Wang, and Ming-Ling Lee. 2022. "Electrical and Hysteresis Characteristics of Top-Gate InGaZnO Thin-Film Transistors with Oxygen Plasma Treatment Prior to TEOS Oxide Gate Dielectrics" Coatings 12, no. 3: 383. https://doi.org/10.3390/coatings12030383

Note that from the first issue of 2016, this journal uses article numbers instead of page numbers. See further details here.

Article Metrics

Back to TopTop