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Review

A Comprehensive Review and Analytical Comparison of Non-Isolated DC-DC Converters for Fuel Cell Applications

1
Department of Electrical Power Engineering, Middle Technical University, Baghdad 10011, Iraq
2
Department of Electrical Engineering, Bundeswehr University Munich, 85577 Neubiberg, Germany
*
Author to whom correspondence should be addressed.
These authors contributed equally to this work.
Energies 2023, 16(8), 3493; https://doi.org/10.3390/en16083493
Submission received: 15 February 2023 / Revised: 28 March 2023 / Accepted: 12 April 2023 / Published: 17 April 2023
(This article belongs to the Section F3: Power Electronics)

Abstract

:
The use of renewable energy sources such as solar photovoltaic, wind, and fuel cells is becoming increasingly prevalent due to a combination of environmental concerns and technological advancements, as well as decreasing production costs. Power electronics DC-DC converters play a key role in various applications, including hybrid energy systems, hybrid vehicles, aerospace, satellite systems, and portable electronic devices. These converters are used to convert power from renewable sources to meet the demands of the load, improving the dynamic and steady-state performance of green generation systems. This study presents a comparison of the most commonly used non-isolated DC-DC converters for fuel cell applications. The important factors considered in the comparison include voltage gain ratio, voltage switch stress, voltage ripple, efficiency, cost, and ease of implementation. Based on the comparison results, the converters have been grouped according to voltage level applications, with low voltage applications being best served by converters such as DBC, DuBC, TLBC, 2-IBC, 1st M-IBC, PSOL, SEPIC, and 1st M-SEPIC owing to their lower cost, smaller size, and reduced switch stress. Medium voltage applications are best suited to converters such as TBC, 1st M-TLBC, 2nd M-TLBC, 4-IBC, 1st M-IBC, 2nd M-IBC, 1st M-PSOL, 2nd M-PSOL, 1st M-SEPIC, and 2nd M-SEPIC, which offer higher efficiency. Finally, high voltage applications are best served by converters such as TBC, 1st M-TBC, 2nd M-IBC, 3rd M-IBC, 3rd M-PSOL, 4th M-PSOL, 2nd M-SEPIC, 3rd M-SEPIC, and 4th M-SEPIC.

1. Introduction

Most power is generated from traditional energy sources, such as coal, petroleum, or natural gas, which emit carbon dioxide and contribute to global warming. The primary cause of climate change is the burning of fossil fuels, which releases greenhouse gases (GHG) into the atmosphere. Nearly 80% of GHGs are generated by the use of fossil fuels. However, the world’s primary energy demand is projected to grow by nearly 60% between 2002 and 2030, with an average annual increase of 1.7 %, leading to further GHG emissions. It is projected that oil reserves will be exhausted by 2040, natural gas by 2060, and coal by 2300 [1]. Given this reality, there is a growing need to develop renewable energy sources (RES) as a means to produce clean and emission-free energy. The search for RES has become an urgent issue [2,3].
RES such as wind power, fuel cells (FC), and photovoltaic (PV) are increasingly being used in various applications, including motor drives, uninterruptible power systems, electric vehicles, microgrids, and more. As presented in [3,4], green hydrogen can play a vital role in reducing the carbon footprint, ensuring sustainability in the transportation and energy sector. Therefore, FCs are one of the key players in the global energy sector, as they are electrochemical devices that convert chemical reactions into electrical energy through an electrolytic process, producing only heat and water as byproducts. There are several types of FCs, including alkaline FCs, phosphoric FCs, molten carbonate FCs, solid oxide FCs, combined heat and power FCs, proton exchange membrane FCs, and regenerative and reversible FCs, each with unique characteristics based on the nature of their application [5]. The most widely used FC type is the proton exchange membrane fuel cell (PEMFC) due to its better efficiency, zero or low emissions, low noise level, and lower operating temperature. However, PEMFC systems have a slow output power and an unregulated DC voltage due to the complex mechanical design and the electrochemical nature of its polarization curve. Variations in operating conditions such as pressure, temperature, mass flow rate, relative humidity, water content, air, hydrogen stoichiometry, and channel shape can impact the electrochemical reaction and thus affect the voltage generated by the FC, requiring the connection of power converters to the load [6].
Power electronic converters serve as intermediaries between power generation and load, primarily used to regulate the input voltage according to the application requirements. For decades, power converters have been prevalent in power engineering and drives and have been adopted to replace conventional voltage divider circuits, including rheostats and power conversion circuits [7]. These conventional methods typically have low output voltage and efficiency. DC-DC converters were first proposed in the 1920s and have been widely used in various applications for over six decades, playing a crucial role in power electronics and drives. They are utilized in many industrial applications, computer hardware circuits, and especially in renewable energy generation. Converters are a critical component of any hybrid renewable energy system as they can stabilize the voltage output during intermittent conditions. The power quality of renewable energy systems heavily depends on the stable operation and control technique of the power converter [8,9]. The first boost converters were used, and then various techniques were derived from conventional boost converters to improve efficiency and conversion rate. These new converter versions aimed to achieve a high voltage gain ratio, increased efficiency, reduced voltage stress, and reduced ripple [10,11].
This paper designs and analyzes the most common types of non-isolated converters, which consist of Multilevel Boost Converters (MLBC) [12,13,14,15,16], Three-Level Boost Converters (TLBC) [17,18,19], Interleaved Boost Converter (IBC) [20,21,22,23,24,25], Positive Output Super-Lift (POSL) [26,27,28,29,30], Single-Ended Primary Inductor Converter (SEPIC) [31,32,33,34,35,36]. For an FC to maximize its output voltage, it is important to investigate the key performance of these converters in terms of voltage gain ratio and voltage stress.
This paper is organized as follows: Section 2 discusses the FC model, and the types of DC-DC converters are discussed in Section 3. The simulation result and comparison between the converters are described in Section 4. Finally, concluding remarks are provided in Section 5.

2. Fuel Cell (FC) Model

The FC operates similarly to a battery with an anode and a cathode, producing a DC voltage. The output voltage of the FC exhibits a noticeable degree of regulation with increasing current, as shown in Figure 1a, where the voltage–current characteristics of a single cell are displayed, with the cell voltage dropping as the current density increases [37,38]. This is due to three types of losses: activation losses, ohmic losses, and concentration losses. Slowness in the chemical reactions at the electrode surfaces causes activation losses, while ohmic losses arise from the contribution of the membrane, electrode material, and various interconnections. Since the voltage drop is related to the current density, operating the FC in the ohmic loss region is advised. The FC can be represented in this region as a Thevenin equivalent circuit consisting of a constant DC voltage source ( V FC ) and a series resistance ( R FC ), as illustrated in Figure 1b. Therefore, the actual cell voltage as described in [39], can be expressed as
V FC = Δ V ohmic Δ V conc Δ V activ
where Δ V ohmic , Δ V conc , and Δ V activ are the voltage drop due to the ohmic, concentration, and activation losses, respectively. A membrane separates the two electrodes of the PEMFC, preventing electron flow and allowing only positive ions to pass. The electrons flow from the anode to the cathode’s surface via the external circuit, where they recombine with the positive ions, H + . As a result, opposite-polarity charged layers emerge on the cathode and electrolyte sides of the membrane where the cathode–membrane interface functions as a massive capacitor that stores an electrical charge and energy [40], which is referred to as “double-layer”. Figure 2 illustrates the fuel cell parameters that have been presented in this paper.

3. DC-DC Converters

The selection of a DC-DC converter is crucial in maximizing the system’s output voltage or power and ensuring its overall operating performance. Different DC-DC converter topologies regulate the input voltage to suit the requirements of the corresponding voltage application. There are two main types of DC-DC converters: isolated and non-isolated [41]. Figure 3 illustrates the power converter family and showcases the common converter topologies in both categories [8]. The design of isolated DC-DC converters commonly features a high-frequency transformer between the input and output, providing galvanic isolation to enhance safety and protect sensitive loads [42]. The output can have either a positive or negative polarity and is highly immune to noise interference. In contrast, non-isolated DC-DC converters do not have galvanic isolation, making them simpler in design and more cost-effective. Due to the presence of a magnetic transformer, isolated DC-DC converters are more suitable for applications that request a high voltage gain ratio. Another characteristic of isolated DC-DC converters is galvanic isolation. However, magnetic transform leads to poor compactness, higher weight, and more complex design [43]. Significant research has been carried out on non-isolated converters, leading to the development of various DC-DC converter topologies for enhanced efficiency, improved switching and control strategies, fault-tolerant operation, and renewable-energy-based applications [44].
Conventional boost converters are widely used in renewable energy applications because of their simple circuit design. In theory, the voltage gain of a boost converter can approach infinity (neglecting ohmic losses) when the duty cycle, is close to unity. However, as the duty cycle increases, the switch’s turn-off period becomes shorter, leading to significant current ripples in the power devices. This results in increased conduction losses and turn-off current, and high-voltage stresses in both the switch and diode equal to the output voltage, especially in high-output applications. This can make the cost of high-voltage stress switches relatively higher than those with low-voltage stress. Furthermore, the hard-switching operation of the boost converter causes significant switching and reverse-recovery losses [2]. To address these limitations, several new step-up converter structures have been proposed, and this study compares the most commonly used DC-DC converters.

3.1. Multilevel Boost Converter

The multilevel boost converter (MBC) has been proposed as an improvement over conventional boost converters. This topology integrates the boost converter with a switched capacitor function, providing several benefits such as maximizing the output voltage with the same input voltage and ensuring self-balanced voltage without significantly increasing the complexity of the converter [12,13]. The number of levels in the MBC can be increased by adding capacitors and diodes, enabling modular implementation without changing the converter structure. The MBC comprises only one actively controlled switch, one inductor, 2N-1 diodes, and 2N-1 capacitors for an N-level configuration, making it a compact and efficient solution for various power conversion applications.

3.1.1. Dual-Level Boost Converter (DBC)

Figure 4 depicts the dual-level boost converter (DBC) utilized in this study, comprising one actively controlled switch, one inductor, three diodes, and three capacitors. The operation of the DBC is divided into two discrete states [14].
  • During the ON state of switch S, the inductor is connected to V in for charge condition; if C 1 ’s voltage is smaller than C 2 ’s voltage then C 2 clamps C 1 ’s voltage through D 2 and S. At the same time, the voltage across C 3 is still constant, as shown in Figure 4a.
  • Figure 4b illustrates the circuit behavior when the switch, S, is turned OFF, the inductor current flows through D 1 when it is forward biased to charge C 2 . When D 1 is still forward biased, the capacitor C 1 and the voltage V in plus the inductor’s voltage clamps the voltage across C 3 and C 2 through D 3 .
The inductor and capacitors selection values depend on the equations that are listed in Table 1. It can be assumed that capacitors C 1 , C 2 , and C 3 are equal.

3.1.2. Triple-Level Boost Converter (TBC)

As mentioned earlier, MBC topology makes it easier to accomplish higher voltage gain relays by adding capacitors and diodes where the number of these components is expressed as 2N-1 diodes and 2N-1 capacitors to achieve an N level of MBC. This study suggested a Triple-level boost converter (TBC) to reach high-voltage gain and reduce switch stress. The operation of TBC is divided into two states, as shown in Figure 5 [15].
  • The inductor is connected to the input voltage when switch S is closed. If the voltage across C 1 is smaller than C 2 , C 1 charges from C 2 through D 2 , which operates in forward bias. At the same time, the voltage across C 1 + C 3 equals the voltage across C 2  + C 4 , C 2 and C 4 act as a voltage source to charge C 1 and C 3 through the diode D 4 , as indicated in Figure 5a.
  • When the switch S is open, the diode D 1 operates in forward bias allowing the energy stored in the inductor to start charging capacitor C 2 . Furthermore, D 3 operates in forward bias, the input voltage, the inductor, and capacitor C 1 supply the capacitors C 2 and C 4 . When the voltage on C 2 + C 4 is equal to the total voltage on the input voltage, the inductor voltage, and the capacitor voltage C 1 through D 5 operates in forward bias, the input voltage, inductor, and capacitors C 1 and C 3 charge capacitors C 2 , C 4 and C 5 as demonstrated in Figure 5b.
The selection values of the inductor and capacitors depend on equations that are illustrated in Table 1 for calculating TBC parameters. It is assumed capacitors C 1 , C 2 , C 3 , C 4 and C 5 are equal.

3.2. 1st Modified-Triple-Level Boost Converter (1st M-TBC)

One of the solutions to obtain a high voltage gain converter is presented by implementing a voltage-lift switched inductor structure that replaces the inductor in TBC to develop a new converter that contains high voltage gain, where this circuit consists of two inductors L 1 and L 2 , one capacitor C x , and two diodes D 11 and D 12 . The 1st M-TBC is suitable for utilization with renewable energy sources for a wide range of input voltages. The circuit of 1st M-TBC illustrated in Figure 6, which is separated into two states [16].
  • When the switch S is closed, the inductors L 1 and L 2 are connected in parallel through diodes D 11 and D 12 when operating in forward bias for charging. If the voltage across C 2 is smaller than C 1 , C 1 will be charged from C 2 through D 2 , which operates in forward bias. At the same time, the voltage across C 1 + C 3 equals the voltage across C 2 +C 4 , C 2 and C 4 act as a voltage source to charge C 1 and C 3 through the diode D 4 , as indicated in Figure 6a.
  • When the switch S is open, the inductors L 1 and L 2 are connected in series through capacitor C x . The diode D 1 operates in forward bias allowing the energy stored in the inductors to start the charges capacitor C 2 . Furthermore, D 3 operates in forward bias, the input voltage, the inductors, and capacitors C x and C 1 supply the capacitors C 2 and C 4 . When the voltage on C 2 + C 4 is equal to the total voltage on the input voltage, the inductors voltage, and the capacitor voltage C 1 through D 5 operates in forward bias, the input voltage, inductor, and capacitors C x , C 1 , and C 3 charge capacitors C 2 , C 4 and C 5 as demonstrated in Figure 6b.
The selection values of the inductors and capacitors depend on equations that are illustrated in Table 1 for calculating 1st M-TBC parameters. It is assumed that capacitors C 1 , C 2 , C 3 , C 4 , and C 5 are equal. In addition, the inductors L 1 and L 2 assumed are equal.

3.3. Double-Boost Converter (DuBC)

To improve the efficiency of conventional boost converter voltage gain and solve the problems of output voltage ripple and robustness, this paper proposes a double-boost converter (DuBC). Figure 7 illustrates the converter consisting of two power switches S 1 and S 2 , two inductors L 1 and L 2 , three diodes D 1 , D 2 , and D 3 , and an output filter capacitor C o . The two switches in the converter operate together without phase shift during the close and open states; furthermore, this converter operates in two states [45].
  • When switches S 1 and S 2 are closed, the inductors L 1 and L 2 charge from the voltage source. The input voltage, V in , charges the inductor L 1 through the switch S 1 to form the first loop and charges the inductor L 2 through diode D 1 and the switch S 2 to form the second loop. In addition, the capacitor C o delivers power to the load, as shown in Figure 7a.
  • Figure 7b illustrates the second state of converter operation when switches S 1 and S 2 are open. The input power source V in and inductors L 1 and L 2 are connected in series through diodes D 2 and D 3 that operate in forward bias to provide energy to the load and charge capacitor C o .
The inductors and capacitor selection values depend on equations that illustrates in Table 1 for calculating DuBC parameters. It is assumed that the inductor values, L 1 and L 2 , are equal.

3.4. Three-Level Boost Converter (TLBC)

To compensate for the drawbacks of the conventional boost converter. The three-level boost converter (TLBC) was developed and widely used for the hybrid hydrogen-fuel-cell railway system because the converter demonstrates low switching loss and can work with higher switching frequency. TLBC comprises two switches S 1 and S 2 and two diodes D 1 and D 2 . Nevertheless, the TLBC utilizes a single input inductor L and adopts two output capacitors C 1 and C 2 to generate three-level voltage. The switches operate with a 180 phase shift to minimize current ripple [17]. The circuit of TLBC illustrated in Figure 8, which is separated into two states.
  • When S 1 and S 2 are closed. The current flow through the inductor L, which begins the charge with D 1 and D 2 operating in reverse bias. In addition, the output capacitors C 1 and C 2 discharge the current as much as the output current, as shown in Figure 8a.
  • As indicated in Figure 8b, the operation of switches that appeared S 1 is set closed and S 2 is changed to open status. The current flow from the inductor L, which began the discharge to the load and charge C 2 with D 2 operates as forward bias, while C 1 still discharge to the load. The output voltage is twice as large as the input voltage because the duty is over 0.5.
The selection values of the inductors and capacitors depend on equations that are illustrated in Table 1 for calculating TLBC parameters. The capacitors C 1 and C 2 assumed are equal.

3.5. First Modified Three-Level Boost Converter (1st M-TLBC)

With the aim to widen the step-up voltage gain of the TLBC, the diode rectification quasi-Z (DRqZ) source circuit represents another modified energy storage circuit configuration that has been suggested in combination with TLBC to achieve a high gain converter [18]. It acts as a key that can decrease the voltage stress of all semiconductors to half of the output voltage. It also has a common ground for the input and output by using the flying-capacitor three-level structure and balancing the voltage of the flying capacitor without extra circuit. Furthermore, the duty cycle operation of power switches ranged (from 0.5 to 0.75), which produces a vaster scope of voltage gain. The switches operate with a 180 phase shift to minimize current ripple. Figure 9 illustrates the circuit diagram of the 1st M-TLBC that is separated into three states of operation regain.
  • Figure 9a illustrates the 1st M-TLBC circuit when S 1 is open and S 2 is closed. This state is divided into three loops where energy flows in the circuit. To begin with, L 2 discharge to start charge C 2 through D 1 operates as forward bias. The loop 2, L 1 in series with V in for supplying to charge C 1 when D 2 is forward bias. The S 2 , D 1 , and D 2 are ON states that appear C FLY in charge operation while L 1 , L 2 , and V in in discharge mode represent loop 3.
  • When S 1 is closed and S 2 is open, also in this state three paths of energy, the first two paths same as in the previous state. The difference in loop 3 is depicted as C F L Y in series with L 1 , L 2 , and V in at discharge mode for supplying the load and charge C o when D 3 operates in forward bias, as shown in Figure 9b.
  • The last state of operating in this converter is when S 1 and S 2 are closed, which includes two loops of energy flow. The first loop, C 1 in series with V in to charge L 1 with D 1 operates in reverse bias. Similarly, C 2 transfers energy to L 2 through S 1 and S 2 in loop 2. Moreover, C o in discharge mode to supply the load, as shown in Figure 9c.
The selection values of the inductors and capacitors depend on equations that are illustrated in Table 1 for calculating 1st M-TLBC parameters. The capacitors C 1 and C 2 assumed are equal, also inductors L 1 and L 2 are equal.

3.6. Second Modified Three-Level Boost Converter (2nd M-TLBC)

The main disadvantage of the previous converter is that the duty cycle range is limited between 0.5 and 0.75, causing the converter to be sensitive when changes are applied to the duty cycle values. The proposed new converter is based on restructuring the 1st M-TLBC converter to achieve a voltage-balancing controller [19]. It has a high voltage conversion ratio and lower voltage stress on its power switches and diodes. The switches operate with a 180 phase shift to minimize current ripple. Figure 10 depicts a circuit diagram of the 2nd M-TLBC that is separated into four conditions of operation regain.
  • Two current loops appear when S 1 is open, and S 2 is closed, as depicted in Figure 10a. Loop 1: L 1 connected in series with V in to charge C 2 , when D 1 is in forward bias. L 2 and C 3 supply current to charge C 1 and C 2 . Furthermore, D 3 operates as a forward bias to supply the C o and the load representing loop 2.
  • Figure 10b illustrates the second operation state when S 1 is closed, and S 2 is open. The V in , L 1 , and C 2 in series for supplying current to charge C 3 through D 2 operates in forward bias. loop 2 represents C 1 charge from L 2 and C 2 through D 2 operates in forward bias. In addition, D 3 operates as a forward bias to supply the C o and the load.
  • The third state of switches is where S 1 and S 2 are closed. The source V in supplies current to charge L 1 is depicted as loop 1. The power diodes are in reverse bias, so L 2 and C 3 supply the C 3 . The C o in discharge mode to supply the load, as shown in Figure 10c.
  • Final state where S 1 and S 2 are open states and all power diodes are in forward bias, the V in in series with L 1 discharge to supply C 3 , while L 2 charge from C 1 . In addition, D 3 operates as a forward bias to supply the C o and the load. Which describes two loops illustrated in Figure 10d.
The selection values of the inductors and capacitors depend on equations that are illustrated in Table 1 for calculating 2nd M-TLBC parameters. The capacitors C 1 , C 2 and C 3 assumed are equal, moreover, inductors L 1 and L 2 are equal.

3.7. Interleave Boost Converter (IBC)

The interleaved structure is one of the practical solutions to boost the power level, which can reduce the current ripple, decrease the passive component size, enhance the transient response, and realize the thermal distribution [46]. The simplicity is a significant feature of interleave topology because the interleaved boost converter cells share the input current, so the current ripples are small, which maintains the life of FC stacks [47]. Interleaved boost converter consists of “n” single boost converters connected in parallel. In the simulation, there is no boundary for the number of interleaved power branches’ legs. Through practical implementation, as the phase number increases, the system complexity increases, and maintenance becomes problematic. The input/ EMI filter and output capacitor sizes are reduced proportionally with the ripple reduction. The disadvantage of the interleaving approach is the rise in gate driving logic complexity, but perhaps more significantly, the size and cost of the gate drive [48]. The phase-shifted applied for the operation of the switches on the gates defined as
θ = 360 n
where n is the number of phases chosen for the interleave boost converter [20,21,47].

3.7.1. Two Phase Interleave (2-IBC)

Figure 11 illustrates the operation of 2-IBC, which is separated into two states and contains two modes. The phase shifts between each switch are 180 because n equals two depending on Equation (2) [20,21,47].
  • Mode 1: When S 1 is closed and S 2 is open. The current through L 1 began to rise, and L 2 began to discharge to load with D 2 operating as forward bias, as shown in Figure 11a.
  • Mode 2: When S 1 and S 2 are open. The current discharges through the output circuit from L 1 and L 2 to load with D 1 and D 2 operating as forward bias, as shown in Figure 11b.
Due to the symmetry of the circuit, the state II of the analysis is similar to the previous. Modes 3 and 4 are similar to modes 1 and 2.
The selection values of the inductors and capacitors depend on equations that are illustrated in Table 1 for calculating 2-IBC parameters. The inductors L 1 and L 2 assumed are equal.

3.7.2. Four Phase Interleave (4-IBC)

In maintaining the life of FC, researchers should focus on reducing the current ripple because of a significant issue. A way to overcome this problem is using polyphase operation with suitable phase shifts in the control circuit of main switches. Figure 12 illustrates the operation of 4-IBC, which is separated into four states and contains two modes. The phase shifts between each switch are 90 because n equals four depending on Equation (2) [20,21,47].
  • Mode 1: when S 1 is closed. S 2 , S 3 , and S 4 are open. The current through L 1 began to rise, and L 2 , L 3 , and L 4 began to discharge to load with D 2 , D 3 , and D 4 operating as forward bias, as shown in Figure 12a.
  • Mode 2: When S 1 , S 2 , S 3 , and S 4 are open. The current discharges through the output circuit from L 1 , L 2 , L 3 , and L 4 to load with D 1 , D 2 , D 3 , and D 4 operating as forward bias, as shown in Figure 12b.
Due to the symmetry of the circuit, the states II, III, IV of the analysis are similar to the previous. Modes 3 and 4 are similar to modes 1 and 2. Modes 5 and 6 are similar to modes 1 and 2. Furthermore, modes 7 and 8 are similar to modes 1 and 2 [22].
The selection values of the inductors and capacitors depend on equations that are illustrated in Table 1 for calculating 4-IBC parameters. The inductors L 1 , L 2 , L 3 , and L 4 assumed are equal.

3.8. First Modified-Interleave Boost Converter (1st M-IBC)

The main disadvantage of IBC topology is relatively low voltage gain. To improve voltage gain of IBC structures, they can be mixed with a voltage-doubler.The 1st M-IBC circuit proposed is similar to the conventional IBC but includes an extra capacitor C x [23]. For operating IBC with voltage-doubler, the duty cycle value ( 0.5 D 1 ), with this topology illustrated in Figure 13, which is separated into three states.
  • During the period when switch S 1 is OFF, the D 1 is operates in forward bias that apply C x to charge from L 1 as demonstrated in Figure 13a. The C o start discharging to supply the load.
  • While the period when switch S 2 is OFF, the V in , L 2 , and C x are connected in series to supply current to C o , and the load through D 2 when operates as a forward bias, as indicated in Figure 13b.
  • Figure 13c illustrates that in the state of switches, when operating during the ON state, the L 1 and L 2 connected with V in to start charging [23].
The selection values of the inductors and capacitors depend on equations that are illustrated in Table 1 for calculating 1st M-IBC parameters.

3.9. Second Modified-Interleave Boost Converter (2nd M-IBC)

Based on previous modifications of IBC, this study proposed the implementation of another voltage-doubler circuit, the voltage conversion ratio is enlarged, and the substantial duty ratio can be avoided in the high step-up applications. Moreover, the voltage stress of all the power devices is significantly lower than the output voltage. As a result, lower-voltage-rated power devices can be employed, and higher efficiency can be expected. This converter is utilized based on the IBC structure containing two power switches S 1 and S 2 , which operate with 180 phase-shift separated into three operation states [24].
  • As shown in Figure 14a, switches S 1 and S 2 are closed, and the inductors L 1 and L 2 start charging. Meanwhile, all power diodes in this circuit operate in reverse bias. The C o start discharging to supply the load.
  • When S 1 is closed, L 2 is discharged for charging C 1 through D 1 operates in forward bias, whereas L 1 is still charging, as shown in Figure 14b. Moreover, the L 2 and C 2 are in series to supply the load and charge C o when D 3 operates in forward bias.
  • When S 2 is closed, L 1 and C 1 are discharged for charging C 2 through D 2 operates in forward bias and supply the load and charge C o through D 3 operates in forward bias, whereas L 2 is still charging, as shown in Figure 14c.
The selection values of the inductors and capacitors depend on equations that are illustrated in Table 1 for calculating 2nd M-IBC parameters. The capacitors C 1 and C 2 assumed are equal. Furthermore, L 1 and L 2 assumed are equal.

3.10. Third Modified-Interleave Boost Converter (3rd M-IBC)

An interleaved high-gain topology with a simple configuration, effortless control, and diminished switch stress is proposed in this study. Figure 15 illustrates this converter circuit that consists of two inductors L 1 and L 2 , three capacitors C 1 , C 2 , and C o , two switches S 1 and S 2 , and three diodes D 1 , D 2 , and D 3 . The switches function synchronously, facilitating the control of the converter, which is split into two states of operation regain [25].
  • When switches S 1 and S 2 are closed, the inductor L 1 starts to charge from the source V i n , whereas L 2 starts charging by V in and C 1 . Furthermore, the capacitor C 2 charge from V in and C 1 when diode D 2 operates in forward bias. The load energy is supplied by C o , as shown in Figure 15a.
  • Figure 15b displays the open state of the switches. The inductor L 1 with V in charge capacitor C 1 via D 1 operates in forward bias. Moreover, inductor L 2 , V in , and C 2 flow energy to the load, and capacitor C o via D 3 operates in forward bias.
The selection values of the inductors and capacitors depend on equations that are illustrated in Table 1 for calculating 3rd M-IBC parameters.

3.11. Positive Output Super-Lift (PSOL)

One of the advantages of applying the voltage-lift technique is being able to achieve a high-voltage gain converter. This study proposed a new converter with a high voltage gain, reduced voltage stress, and increased reliability called Positive Output Super lift (PSOL) [26]. The PSOL consists of one inductor, two capacitors, two power diodes, and one power switch. Figure 16 depicts the circuit diagram of the PSOL that is split into two states of operation regain.
  • When S operates during the ON state, the current flow charging L 1 and C 1 through the D 1 operate forward biased, while C o supply current to the load at this state as shown in Figure 16a.
  • Figure 16b, at the second condition of S, L 1 and C 1 discharge to provide current to C o and the load when D 2 operates at forward bias.
The selection values of the inductors and capacitors depend on equations that are illustrated in Table 1 for calculating PSOL parameters.

3.12. First Modified-Positive Output Super-Lift (1st M-PSOL)

The proposed modification of PSOL is explained in Figure 17. The 1st M-PSOL scheme is built by replacing the inductor L with the switched-inductor structure that consists of two inductors L 1 and L 2 , and three diodes D 1 , D 2 , and D 3 . The inductors L 1 and L 2 can be separated or magnetically coupled to shape for more efficient use [27]. The 1st M-PSOL split into two states of operation regain.
  • When S is closed, the L 1 , L 2 , and C 1 are connected in parallel through D 1 , D 3 , and D 4 when operating forward bias for start charge from the supply; furthermore, C o discharge to deliver the current to load, as shown in Figure 17a.
  • When S is open, Figure 17b illustrates the state of L 1 , L 2 , and C 1 when starting discharge for charge C o and supplying the load through D 2 and D 5 when operating forward bias.
The 1st M-PSOL selection values of the inductors and capacitors depend on equations that are illustrated in Table 1, where L 1 and L 2 are assumed equal.

3.13. Second Modified-Positive Output Super-Lift (2nd M-PSOL)

For the aim to increase voltage gain, this study proposed a change structure in the previous converter by replacing D 2 with a new capacitor C x as shown in Figure 18 [28]. The 2nd M-PSOL split into two states of operation regain.
  • Figure 18a illustrates the ON state of switch S; when D 1 , D 2 , and D 3 operate forward biased, the storage elements L 1 , and L 2 are connected in parallel with the source to start charge. Moreover, in this stage C x , and C 1 start charging. The C o discharge to supply the load.
  • When S is OFF condition, L 1 , L 2 , C x , and C 1 discharge to supply C o and load when connected in series through D 4 operate at forward bias, as shown in Figure 18b.
The 2nd M-PSOL inductors and capacitors selection values depend on equations that illustrates in Table 1, where assumed L 1 , and L 2 are equal, also C x , and C 1 are equal.

3.14. Third Modified-Positive Output Super-Lift (3rd M-PSOL)

This study proposed the combination of cascaded boost and Luo converters to accomplish higher values of voltage gain, which is the primary reason for the suitability of the designed converter utilization in renewable energy applications [29]. The circuit schematic of the 3rd M-PSOL topology is demonstrated in Figure 19. The first stage of the designed converter operates as a cascaded boost. Thus, a PSOL converter in the second stage operates, increasing the voltage gain. A higher voltage gain ratio became achievable with a lower duty cycle value. The 3rd M-PSOL split into two states of operation regain.
  • In the first operation mode, the switch S is ON. Meanwhile, the D 1 and D 3 diodes are in the forward bias. The inductors L 1 and L 2 and capacitor C 2 start charging at this state. Meanwhile, capacitors C 1 and C o discharge, as shown in Figure 19a.
  • On the other hand, Figure 19b illustrates the second operation mode when switch S is OFF. The inductors L 1 and L 2 and capacitor C 2 start discharge to provide current to C 1 and C o through D 2 , and D 4 operates at forward bias.
The selection values of the inductors and capacitors depend on equations that are illustrated in Table 1 for calculating 3rd M-PSOL parameters.

3.15. Fourth Modified-Positive Output Super-Lift (4th M-PSOL)

Another integration of the PSOL converter with the Cuk converter is proposed in this study to reach high voltage gain [30]. The circuit schematic of the 4th M-PSOL topology is demonstrated in Figure 20, where the two switches S 1 and S 2 operate simultaneously without any phase shift between these switches. The first stage of the conceived converter operates as a Cuk converter. Hence, a PSOL converter in the second stage operates, raising the voltage gain. The 4th M-PSOL split into two states of operation regain.
  • Figure 20a illustrates the first state of operation of the 4th M-PSOL, where S 1 , S 2 , and D 1 operate during the ON state condition. Due to this condition, C 1 and C 2 have become parallel. Consequently, their voltage has become equal to each other. The parallel connection of the C 1 and C 2 causes a current to fly from the C 1 to the positive terminal of the C 2 to charge this capacitor. The inductors L 1 and L 2 start charging in this state. The C 1 and C o capacitors have become discharged by the second inductor and supply load, respectively.
  • When switches S 1 and S 2 are OFF. The C 1 and the C o capacitors become charged by the flowing current of the L 1 and L 2 inductors, respectively. Furthermore, the capacitor C 2 discharge to supply the load and C o through D 3 operates in forward bias, as shown in Figure 20b.
The selection values of the inductors and capacitors depend on equations that are illustrated in Table 1 for calculating 4th M-PSOL parameters.

3.16. Single-Ended Primary Inductor Converter (SEPIC)

The single-ended primary inductor converter is shown in Figure 21 and is generally referred to as a SEPIC converter. It can also step up and step down the output voltage levels. It has a non-inverting output, making it more appealing than buck-boost converters, and it is preferred for high-power applications. This setup benefits vital features such as the continuous output current, minimizing the switching stress, and output ripple, so the SEPIC converter is utilized for renewable energy applications [9]. As mentioned, SEPIC operates as the buck-boost converter; If D is less than 0.5, the converter reduces the supplied voltage and functions as a buck converter; if D is more significant than 0.5, the converter rises the given voltage and functions as a boost converter. The SEPIC split into two states of operation regain [31,32].
  • As presented in Figure 21a, switch S is closed, and the inductor L 1 gets charged by the voltage source V in . In addition, the inductor L 2 takes energy from the capacitor C 1 . The output capacitor C o discharges to supply the load.
  • When switch S is open, the inductors L 1 and L 2 discharging to charge C 1 , C o , and supply the load when diode D operates in forward bias, as shown in Figure 21b.
The selection values of the inductors and capacitors depend on equations that are illustrated in Table 1 for calculating SEPIC parameters, where L 1 and L 2 assumed are equal.

3.17. First Modified-Single Ended Primary Inductor Converter (1st SEPIC)

This study suggested a modified SEPIC converter by adding only two components with the diode D x and the capacitor C x , as presented in Figure 22. This topology presents low switch voltage and high efficiency for high output voltage applications by increasing voltage gain [33]. The 1st SEPIC split into two states of operation regain.
  • When switch S is closed, the input voltage is applied to charge the inductor L 1 , and the inductor L 2 and capacitor C 1 start charging form the C x . While C o discharge to supply the load, as shown in Figure 22a.
  • Figure 22b illustrates the open state of switch S; the L 1 and C 1 discharge to load through diode D 1 when operating in forward bias. Furthermore, the capacitor C x start charge through the diode D x when operating in forward bias. The inductor L 2 is discharged to load through diode D 1 .
The selection values of the inductors and capacitors depend on equations that are illustrated in Table 1 for calculating 1st M-SEPIC parameters, where L 1 and L 2 assumed are equal, and C x and C 1 assumed are equal.

3.18. Second Modified-Single Ended Primary Inductor Converter (2nd M-SEPIC)

Based on a previous modification of the SEPIC converter, this study proposed utilizing a combination of 1st M-SEPIC with switched capacitor circuit for achieving a new modification of SEPIC to reach a high voltage conversion ratio. The switched capacitor structure consists of two capacitors C 3 and C 4 , and two diodes D 2 and D 3 [34]. The 2nd M-SEPIC split into two states of operation regain, as shown in Figure 23.
  • As shown in Figure 23a, switch S is closed. The input voltage is applied to charge the inductor L 1 , and the L 2 and C 1 start charge from the C 2 . Through D 3 is forward bias C 3 start charge from C 4 and C o supply the load.
  • When switch S is open, the L 1 , and C 1 discharge to load through D 4 . Furthermore, L 2 charges from source, L 1 , and C 1 . While, C 2 , C 4 , C o start charging when D 1 , D 2 , and D 4 operating as forward bias, as shown in Figure 23b.
The 2nd M-SEPIC calculated value parameters are illustrated in Table 1. Where inductors L 1 and L 2 are assumed equal. Furthermore, capacitors C 1 , C 2 , C 3 , and C 4 are assumed equal.

3.19. Third Modified-Single Ended Primary Inductor Converter (3rd M-SEPIC)

This paper proposed a modified SEPIC converter to achieve high static gain together with maintaining low-input current ripples inherently. Moreover, the switching losses and stress are significantly reduced due to low-input current ripples. The modification is achieved based on 1st M-SEPIC with replacement L 1 by utilizing a switch-inductor circuit that consists of two inductors L 1 and L 2 , and three diodes D 1 , D 2 , and D 3 . The 3rd M-SEPIC split into two states of operation regain, as shown in Figure 24 [35].
  • When S is turned on, the inductors L 1 and L 2 are connected parallel to the source voltage through forward-biased diodes D 1 and D 3 . At the same time, capacitors C 1 and L 3 are charged from C 2 via switch S at closed state. The load is driven by an output voltage across capacitor C o , as shown in Figure 24a.
  • In this mode, switch S is turned off. The inductors L 1 and L 2 are now connected in series via forward-biased diode D 2 . After that, inductors L 1 , L 2 , and L 3 are discharging linearly, whereas capacitors C 1 , C 2 , and C o are charging via forward-biased diodes D 4 and D 5 , as shown in Figure 24b.
The 3rd M-SEPIC calculated value parameters are illustrated in Table 1. Where inductors L 1 , L 2 , and L 3 are assumed equal, and capacitors C 1 and C 2 are also assumed equal.

3.20. Fourth Modified-Single Ended Primary Inductor Converter (4th M-SEPIC)

The voltage gain ratio is still limited, so this study proposed a new modification of the SEPIC converter that combines 2nd M-SEPIC and 3rd M-SEPIC converter to reach higher conversion with a low-duty cycle. Figure 25 depicts the 4th M-SEPIC circuit, which operates in two states [36].
  • When S is closed, the inductors L 1 and L 2 are connected parallel to the source voltage through forward-biased diodes D 1 and D 3 . At the same time, the L 3 and C 1 charge from the C 2 . Through D 6 is forward bias C 3 start charge from C 4 and C o supply the load.
  • When switch S is open, the inductors L 1 and L 2 are now connected in series via forward-biased diode D 2 . After that, capacitor C 2 start charge when D 4 operates as forward bias. The inductor L 3 in this state discharge to supply the load in same currnt path of L 1 and L 2 . In contrast, capacitor C 4 start charging through D 5 from C 4 . While C 3 discharge to load and charge C o , as shown in Figure 25b.
The 4th M-SEPIC calculated value parameters are illustrated in Table 1. Where inductors L 1 , L 2 , and L 3 are assumed equal. Furthermore, capacitors C 1 , C 2 , C 3 , and C 4 are assumed equal.
Table 1 illustrates the equations employed to design these converter parameters and the value of these parameters for each converters type, when assumed duty cycle D = 0.5, the input voltage V in = 24 V, switching frequency f s = 25 kHz, inductor ripple current Δ I L = 10% of input current, and output voltage ripple Δ V o = 5% of output voltage.
Table 1. Analytical equations for component parameter design.
Table 1. Analytical equations for component parameter design.
Converter TypeEquationsParameters
InductorsCapacitorsInductorsCapacitors
DBC L = V in · D f s · Δ i L C = V o · D f s · Δ V o · R L 1 = 100   μ H C 1 = C 2 = C 3 = C 4 = 4.5   μ F
TBC L = V in · D f s · Δ i L C = V o · D f s · Δ V o · R L 1 = 100   μ H C 1 = C 2 = C 3 = C 4 = C 5 = 4.5   μ F
1st M-TBC L = V in · D f s · Δ i L C = V o · D f s · Δ V o · R L 1 = L 2 = 100   μ H C 1 = C 2 = C 3 = C 4 = C 5 = 4.5   μ F
DuBC L = V in · D 2 · f s · Δ i L C = V o · D f s · Δ V o · R L 1 = L 2 = 50   μ H C o = 10 μ F
TLBC L = V in · ( D 0.5 ) f s · Δ i L C = 2 V o · ( D 0.5 ) f s · Δ V o · R L 1 = 10   μ H C 1 = C 2 = 0.25   μ F
1st M-TLBC L = V o · ( 2 D 1 ) · ( 1 D ) 2 f s · Δ i L C = V o · ( 2 D 1 ) ( 3 4 D ) · f s · Δ V c · R ;   C F L Y = V o · ( 2 D 1 ) ( 3 4 D ) · f s · Δ V c · R ;   C o = V o · D f s · Δ V o · R L 1 = L 2 = 5   μ H C 1 = C 2 = 0.25   μ F ; C F L Y = 8 μ F ;
C o = 10 μ F
2nd M-TLBC L = V o · ( 2 D 1 ) · ( 1 D ) 2 f s · Δ i L C = V o · ( 2 D 1 ) ( 3 4 D ) · f s · Δ V c · R ;   C o = V o · D f s · Δ V o · R L 1 = L 2 = 5   μ H C 1 = C 2 = 0.25   μ F   C o = 10   μ F
2-IBC L = V in · D f s · Δ i L C o = V o · D f s · Δ V o · R L 1 = L 2 = 100   μ H C 0 = 10   μ F
4-IBC L = V in · D f s · Δ i L C o = V o · D f s · Δ V o · R L 1 = L 2 = L 3 = L 4 = 100   μ H C o = 10   μ F
1st M-IBC L = V in · D f s · Δ i L C = V o · D f s · Δ V o ;   C o = V o · D f s · Δ V o · R L 1 = L 2 = 100   μ H C x = 40,000 μ F C o = 10   μ F
2nd M-IBC L = V in · D f s · Δ i L C = V o · D f s · Δ V o ;   C o = V o · D f s · Δ V o · R L 1 = L 2 = 100   μ H C 1 = C 2 = 40,000 μ F C o = 10   μ F
3rd M-IBC L 1 = V in · D f s · Δ i L ;   C 1 = V o · D f s · Δ V c · R · ( 1 D ) 2 ;   C 2 = V o · D f s · Δ V c · R ;   C o = V o · D f s · Δ V o · R L 1 = L 2 = 150   μ H C 1 = C 2 = 4   μ F   C o = 10   μ F
L 2 = V in · D · ( 2 D ) f s · Δ i L
PSOL L = V in · D f s · Δ i L C = V o · D f s · Δ V c · R ;   C o = V o · D f s · Δ V o · R L 1 = 100   μ H C 1 = 5   μ F   C o = 10   μ F
1st M-PSOL L = V in · D f s · Δ i L C = V o · D f s · Δ V c · R ;   C o = V o · D f s · Δ V o · R L 1 = L 2 = 100   μ H C 1 = 5   μ F   C o = 10   μ F
2nd M-PSOL L = V in · D f s · Δ i L C = V o · D f s · Δ V c · R ;   C o = V o · D f s · Δ V o · R L 1 = L 2 = 100   μ H C x = C 1 = 5   μ F   C o = 10   μ F
3rd M-PSOL L 1 = V in · D f s · Δ i L ;   C 1 = V o · D f s · Δ V c · R · ( 1 D ) ;   C 2 = V o · D f s · Δ V c · R ;   C o = V o · D f s · Δ V o · R L 1 = L 2 = 130   μ H C 1 = C 2 = 8   μ F   C o = 10   μ F
L 2 = V in · D f s · Δ i L · ( 1 D )
4th M-PSOL L 1 = V in · D f s · Δ i L ;   L 2 = V in · D f s · Δ i L · ( 1 D ) C 1 = V o · D f s · Δ V c · R · ( 1 D ) ;   C 2 = V o · D f s · Δ V c · R ;   C o = V o · D f s · Δ V o · R L 1 = L 2 = 130   μ H C 1 = C 2 = 8   μ F   C o = 10   μ F
SEPIC L = V in · D f s · Δ i L C = V o · D f s · Δ V c · R ;   C o = V o · D f s · Δ V o · R L 1 = L 2 = 100   μ H C 1 = 4   μ F   C o = 10   μ F
1st M-SEPIC L = V in · D f s · Δ i L C = V o · D f s · Δ V c · R ;   C o = V o · D f s · Δ V o · R L 1 = L 2 = 100   μ H C 1 = C x = 4   μ F   C o = 10   μ F
2nd M-SEPIC L = V in · D f s · Δ i L C = V o · D f s · Δ V c · R ;   C o = V o · D f s · Δ V o · R L 1 = L 2 = 100   μ H C 1 = C 2 = C 3 = C 4 = 5   μ F
C o = 10   μ F
3rd M-SEPIC L = V in · D f s · Δ i L C = V o · D f s · Δ V c · R ;   C o = V o · D f s · Δ V o · R L 1 = L 2 = L 3 = 100   μ H C 1 = C 2 = 5   μ F   C o = 10   μ F
4th M-SEPIC L = V in · D f s · Δ i L C = V o · D f s · Δ V c · R ;   C o = V o · D f s · Δ V o · R L 1 = L 2 = L 3 = 100   μ H C 1 = C 2 = C 3 = C 4 = 5   μ F
C o = 10   μ F

4. Comparison Results

This study presents an analytical comparison between the most common non-isolated DC-DC converters. These converters are utilized in MATLAB/Simulink for comparison with several vital performances. Figure 26 displays the output voltage of converters when these converters operate at 0.5 duty cycle. The 1st M-TBC converter reaches 12 times the input voltage, which means this converter can be considered to exhibit the highest voltage gain compared with other converter types.The voltage gain ratio for each DC-DC converter studied in this paper are illustrated in Figure 27. The duty ratio range for applied comparison is between (0–0.8) to determine which converter has the highest voltage gain ratio. From Figure 27 mentioned above, the 1st M-TLBC converter can achieve a 50 voltage gain ratio when the duty cycle equals 0.74. Nevertheless, this voltage gain ratio can only be reached in the theoretical calculation, so these converters (1st M-TBC, 3rd M-IBC, 3rd M-PSOL, 4th M-PSOL, and 4th M-SEPIC) consider the highest voltage gain ratio that achieves 30 times. The voltage stress on the switch in these converters was calculated based on the duty range between (0–0.8), as depicted in Figure 28. The TLBC and 2nd M-TLBC appear to have less voltage stress values when compared with other converter types. The voltage stress equals 60 V at duty equals 0.8. Furthermore, the output voltage ripple is another essential factor that is considered for comparison between DC-DC converter types. Figure 29 illustrates the voltage ripple for each converter when these converters operate at 0.5 duty cycle. The ripple in the output voltage waveform of these (DBC, TBC,1stM-TBC, 1st M-PSOL, and 2nd M-SEPIC) converters is more than 1 volt. Furthermore, the 1st M-TBC can be classified as including the highest converter ripple in output voltage equal to 5 volts. Other converters not mentioned are less than 1-volt ripple in output voltage, so in this state, all the converters produce a good performance.
Table 2 lists a summary of the converters utilized in this study; the considered typical parameters are the equation for calculating voltage gain, the equation for calculating voltage stress on the switch, and these converters consist of the number of components. The converters (PSOL and SEPIC) appear as fewer components required, while the converters (1st M-TBC and 4th M-PSOL) appear as higher components. The number of components is essential for comparing these converters depending on the size and ease of implementation of critical performance parameter comparison. When comparing the converters, they are classified into three categories suitable for low-voltage applications, medium-voltage applications, and high-voltage applications to appear in which field this converter is appropriate. For lower voltage applications, these converters (DBC, DuBC, TLBC, 2-IBC, 1st M-IBC, PSOL, SEPIC, and 1st M-SEPIC) are suitable and reasonable because of the lower cost, smaller size, and have less switch stress. While the converters (TBC, 1st M-TLBC, 2nd M-TLBC, 4-IBC, 1st M-IBC, 2nd M-IBC, 1st M-PSOL, 2nd M-PSOL, 1st M-SEPIC, and 2nd M-SEPIC) are more efficient and suitable for medium-voltage applications. The high-voltage applications require converters with high-voltage gain but without increasing cost and more difficult implementation of the converter circuit. So, the converters (TBC, 1st M-TBC, 2nd M-IBC, 3rd M-IBC, 3rd M-PSOL, 4th M-PSOL, 2nd M-SEPIC, 3rd M-SEPIC, and 4th M-SEPIC) are more appropriate for high-voltage applications. Figure 30 illustrates the result of the comparisons relative to the different performance factors for comprehensively clarifying these converters in which categories are sufficient and proper should be utilized. Numbers from 1 to 10 are used to assess the different topologies. Number 1 expresses the worst performance, whereas 10 denotes the best performance.

5. Conclusions

The performances of several non-isolated DC-DC converter topologies were comprehensively investigated to assess which converter is more suitable for FC applications. Based on the voltage gain, voltage stress, size of the circuit, and efficiency, the DC-DC converters were broadly classified depending on voltage-level applications, which are categorized into three groups: low-level voltage, medium-level voltage, and high-level voltage. Based on the comparison results, low-voltage applications are best served by converters such as DBC, DuBC, TLBC, 2-IBC, 1st M-IBC, PSOL, SEPIC, and 1st M-SEPIC due to their lower cost, smaller size, and reduced switch stress. Medium-voltage applications are best suited to converters such as TBC, 1st M-TLBC, 2nd M-TLBC, 4-IBC, 1st M-IBC, 2nd M-IBC, 1st M-PSOL, 2nd M-PSOL, 1st M-SEPIC, and 2nd M-SEPIC, which offer higher efficiency. Finally, high-voltage applications are best served by converters such as TBC, 1st M-TBC, 2nd M-IBC, 3rd M-IBC, 3rd M-PSOL, 4th M-PSOL, 2nd M-SEPIC, 3rd M-SEPIC, and 4th M-SEPIC.

Author Contributions

Conceptualization, F.A.A. and T.A.A.-J.; methodology, F.A.A. and T.A.A.-J.; software, F.A.A. and T.A.A.-J.; validation, F.A.A., T.A.A.-J. and A.A.O.; formal analysis, F.A.A. and T.A.A.-J.; investigation, F.A.A. and T.A.A.-J.; resources, F.A.A.,T.A.A.-J., A.A.O. and A.K.; data curation, F.A.A. and T.A.A.-J.; writing—original draft preparation, F.A.A.,T.A.A.-J., A.A.O. and A.K.; writing—review and editing, F.A.A.,T.A.A.-J., A.A.O., A.K. and M.K.; visualization, F.A.A., T.A.A.-J. and A.K.; supervision, A.A.O., A.K. and M.K.; project administration, T.A.A.-J., A.K., M.K. and T.W.; funding acquisition, A.K., M.K. and T.W. All authors have read and agreed to the published version of the manuscript.

Funding

This research is funded by MORE/ELAPSED as part of dtec.bw—Digitalization and Technology Research Center of the Bundeswehr which we gratefully acknowledge.

Conflicts of Interest

The authors declare no conflict of interest.

Abbreviations

The following abbreviations are used in this manuscript:
DuBCDouble-boost converter
DDuty Cycle
FCFuel Cell
GHGGreenhouse Gas
IBCInterleaved Boost Converter
MLBCMultilevel Boost Converter
PVPhotovoltaic
PSOLPositive Output Super Lift
PEMFCProton Exchange Membrane Fuel Cell
RESRenewable Energy Source
SEPICSingle-Ended Primary Inductor Converter
TLBCThree-level boost converter

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Figure 1. (a) VI characteristic feature and corresponding (b) equivalent circuit model of an FC system.
Figure 1. (a) VI characteristic feature and corresponding (b) equivalent circuit model of an FC system.
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Figure 2. FC stack parameters.
Figure 2. FC stack parameters.
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Figure 3. Boostconverter family, including isolated and non-isolated topologies.
Figure 3. Boostconverter family, including isolated and non-isolated topologies.
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Figure 4. DBC operation: (a) S closed and (b) S open.
Figure 4. DBC operation: (a) S closed and (b) S open.
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Figure 5. TBC operation: (a) S closed and (b) S open.
Figure 5. TBC operation: (a) S closed and (b) S open.
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Figure 6. 1st M-TBC operation: (a) S closed and (b) S open.
Figure 6. 1st M-TBC operation: (a) S closed and (b) S open.
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Figure 7. DuBC operation: (a) S closed and (b) S open.
Figure 7. DuBC operation: (a) S closed and (b) S open.
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Figure 8. TLBC operation: (a) S 1 and S 2 closed, and (b) S 1 closed.
Figure 8. TLBC operation: (a) S 1 and S 2 closed, and (b) S 1 closed.
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Figure 9. 1st M-TLBC operation: (a) S 2 closed, (b) S 1 closed, and (c) S 1 and S 2 closed.
Figure 9. 1st M-TLBC operation: (a) S 2 closed, (b) S 1 closed, and (c) S 1 and S 2 closed.
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Figure 10. 2nd M-TLBC operation: (a) S 2 closed, (b) S 1 closed, (c) S 1 and S 2 closed, and (d) S 1 and S 2 open.
Figure 10. 2nd M-TLBC operation: (a) S 2 closed, (b) S 1 closed, (c) S 1 and S 2 closed, and (d) S 1 and S 2 open.
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Figure 11. 2-IBC operation: (a) S 1 closed, and (b) all switches open.
Figure 11. 2-IBC operation: (a) S 1 closed, and (b) all switches open.
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Figure 12. 4-IBC operation: (a) S 1 closed, and (b) all switches open.
Figure 12. 4-IBC operation: (a) S 1 closed, and (b) all switches open.
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Figure 13. 1st M-IBC operation: (a) S 2 closed, (b) S 1 closed, and (c) S 1 and S 2 closed.
Figure 13. 1st M-IBC operation: (a) S 2 closed, (b) S 1 closed, and (c) S 1 and S 2 closed.
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Figure 14. 2nd M-IBC operation: (a) S 1 and S 2 , (b) S 1 closed, and (c) S 2 closed.
Figure 14. 2nd M-IBC operation: (a) S 1 and S 2 , (b) S 1 closed, and (c) S 2 closed.
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Figure 15. 3rd M-IBC operation: (a) S 1 and S 2 closed, and (b) S 1 and S 2 closed.
Figure 15. 3rd M-IBC operation: (a) S 1 and S 2 closed, and (b) S 1 and S 2 closed.
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Figure 16. PSOL operation: (a) S closed, and (b) S open.
Figure 16. PSOL operation: (a) S closed, and (b) S open.
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Figure 17. 1st M-PSOL operation: (a) S closed, and (b) S open.
Figure 17. 1st M-PSOL operation: (a) S closed, and (b) S open.
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Figure 18. 2nd M-PSOL operation: (a) S closed, and (b) S open.
Figure 18. 2nd M-PSOL operation: (a) S closed, and (b) S open.
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Figure 19. 3rd M-PSOL operation: (a) S closed, and (b) S open.
Figure 19. 3rd M-PSOL operation: (a) S closed, and (b) S open.
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Figure 20. 4th M-PSOL operation: (a) S 1 and S 2 closed, and (b) S 1 and S 2 open.
Figure 20. 4th M-PSOL operation: (a) S 1 and S 2 closed, and (b) S 1 and S 2 open.
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Figure 21. SEPIC operation: (a) S closed, and (b) S open.
Figure 21. SEPIC operation: (a) S closed, and (b) S open.
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Figure 22. 1st M-SEPIC operation: (a) S closed, and (b) S open.
Figure 22. 1st M-SEPIC operation: (a) S closed, and (b) S open.
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Figure 23. 2nd M-SEPIC operations (a) S closed (b) S open.
Figure 23. 2nd M-SEPIC operations (a) S closed (b) S open.
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Figure 24. 3rd M-SEPIC operations (a) S closed (b) S open.
Figure 24. 3rd M-SEPIC operations (a) S closed (b) S open.
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Figure 25. 4th M-SEPIC operations (a) S closed (b) S open.
Figure 25. 4th M-SEPIC operations (a) S closed (b) S open.
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Figure 26. Output Voltage of Converters at D = 0.5 (a) Group 1 (DBC, TBC, 1st M-TBC, DuBC, TLBC, 1st M-TLBC, and 2nd M-TLBC) (b) Group 2 (2-IBC, 4-IBC, 1st M-IBC, 2nd M-IBC, and 3rd M-IBC) (c) Group 3 (PSOL, 1st M-PSOL, 2nd M-PSOL, 3rd M-PSOL, and 4th M-PSOL) (d) Group 4 (SEPIC, 1st M-SEPIC, 2nd M-SEPIC, 3rd M-SEPIC, and 4th M-SEPIC).
Figure 26. Output Voltage of Converters at D = 0.5 (a) Group 1 (DBC, TBC, 1st M-TBC, DuBC, TLBC, 1st M-TLBC, and 2nd M-TLBC) (b) Group 2 (2-IBC, 4-IBC, 1st M-IBC, 2nd M-IBC, and 3rd M-IBC) (c) Group 3 (PSOL, 1st M-PSOL, 2nd M-PSOL, 3rd M-PSOL, and 4th M-PSOL) (d) Group 4 (SEPIC, 1st M-SEPIC, 2nd M-SEPIC, 3rd M-SEPIC, and 4th M-SEPIC).
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Figure 27. Voltage Gain ratio of Converters (a) Group 1 (DBC, TBC, 1st M-TBC, DuBC, TLBC, 1st M-TLBC, and 2nd M-TLBC) (b) Group 2 (2-IBC, 4-IBC, 1st M-IBC, 2nd M-IBC, and 3rd M-IBC) (c) Group 3 (PSOL, 1st M-PSOL, 2nd M-PSOL, 3rd M-PSOL, and 4th M-PSOL) (d) Group 4 (SEPIC, 1st M-SEPIC, 2nd M-SEPIC, 3rd M-SEPIC, and 4th M-SEPIC).
Figure 27. Voltage Gain ratio of Converters (a) Group 1 (DBC, TBC, 1st M-TBC, DuBC, TLBC, 1st M-TLBC, and 2nd M-TLBC) (b) Group 2 (2-IBC, 4-IBC, 1st M-IBC, 2nd M-IBC, and 3rd M-IBC) (c) Group 3 (PSOL, 1st M-PSOL, 2nd M-PSOL, 3rd M-PSOL, and 4th M-PSOL) (d) Group 4 (SEPIC, 1st M-SEPIC, 2nd M-SEPIC, 3rd M-SEPIC, and 4th M-SEPIC).
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Figure 28. Voltage Stress on Switch S of Converters (a) Group 1 (DBC, TBC, 1st M-TBC, DuBC, TLBC, 1st M-TLBC, and 2nd M-TLBC) (b) Group 2 (2-IBC, 4-IBC, 1st M-IBC, 2nd M-IBC, and 3rd M-IBC) (c) Group 3 (PSOL, 1st M-PSOL, 2nd M-PSOL, 3rd M-PSOL, and 4th M-PSOL) (d) Group 4 (SEPIC, 1st M-SEPIC, 2nd M-SEPIC, 3rd M-SEPIC, and 4th M-SEPIC).
Figure 28. Voltage Stress on Switch S of Converters (a) Group 1 (DBC, TBC, 1st M-TBC, DuBC, TLBC, 1st M-TLBC, and 2nd M-TLBC) (b) Group 2 (2-IBC, 4-IBC, 1st M-IBC, 2nd M-IBC, and 3rd M-IBC) (c) Group 3 (PSOL, 1st M-PSOL, 2nd M-PSOL, 3rd M-PSOL, and 4th M-PSOL) (d) Group 4 (SEPIC, 1st M-SEPIC, 2nd M-SEPIC, 3rd M-SEPIC, and 4th M-SEPIC).
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Figure 29. Voltage Ripple (a) DBC (b) TBC (c) 1st M-TBC (d) DuBC (e) TLBC (f) 1st M-TLBC (g) 2nd M-TLBC (h) 2-IBC (i) 4-IBC (j) 1st M-IBC (k) 2nd M-IBC (l) 3rd M-IBC (m) PSOL (n) 1st M-PSOL (o) 2nd M-PSOL (p) 3rd M-PSOL (q) 4th M-PSOL (r) SEPIC (s) 1st M-SEPIC (t) 2nd M-SEPIC (u) 3rd M-SEPIC (v) 4th M-SEPIC.
Figure 29. Voltage Ripple (a) DBC (b) TBC (c) 1st M-TBC (d) DuBC (e) TLBC (f) 1st M-TLBC (g) 2nd M-TLBC (h) 2-IBC (i) 4-IBC (j) 1st M-IBC (k) 2nd M-IBC (l) 3rd M-IBC (m) PSOL (n) 1st M-PSOL (o) 2nd M-PSOL (p) 3rd M-PSOL (q) 4th M-PSOL (r) SEPIC (s) 1st M-SEPIC (t) 2nd M-SEPIC (u) 3rd M-SEPIC (v) 4th M-SEPIC.
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Figure 30. Radar Chart for Summarize Comparison (a) Group 1 (DBC, TBC, 1st M-TBC, DuBC, TLBC, 1st M-TLBC, and 2nd M-TLBC) (b) Group 2 (2-IBC, 4-IBC, 1st M-IBC, 2nd M-IBC, and 3rd M-IBC) (c) Group 3 (PSOL, 1st M-PSOL, 2nd M-PSOL, 3rd M-PSOL, and 4th M-PSOL) (d) Group 4 (SEPIC, 1st M-SEPIC, 2nd M-SEPIC, 3rd M-SEPIC, and 4th M-SEPIC).
Figure 30. Radar Chart for Summarize Comparison (a) Group 1 (DBC, TBC, 1st M-TBC, DuBC, TLBC, 1st M-TLBC, and 2nd M-TLBC) (b) Group 2 (2-IBC, 4-IBC, 1st M-IBC, 2nd M-IBC, and 3rd M-IBC) (c) Group 3 (PSOL, 1st M-PSOL, 2nd M-PSOL, 3rd M-PSOL, and 4th M-PSOL) (d) Group 4 (SEPIC, 1st M-SEPIC, 2nd M-SEPIC, 3rd M-SEPIC, and 4th M-SEPIC).
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Table 2. Summary of converter characteristics.
Table 2. Summary of converter characteristics.
Converter TypeNo. of ComponentsVoltage GainVoltage Stress Across
the Switch S
SLCD
DBC1133 2 1 D V o 2
TBC1155 3 1 D V o 3
1st M-TBC1267 6 1 D V o 3
DuBC2213 1 + D 1 D V o + V in 2
TLBC2122 1 1 D V o 2
1st M-TLBC2243 2 3 4 · D V o 2
2nd M-TLBC2243 1 + D 1 D D < 0.5 0.5 + D 1 D D 0.5 V o 2 ( 1 + D ) D < 0.5 V o 1 + 2 D D 0.5
2-IBC2212 1 1 D V o
4-IBC4414 1 1 D V o
1st M-IBC2222 1 ( 1 D ) 2 D < 0.5 2 1 D D 0.5 V o 2
2nd M-IBC2233 3 1 D V o 3
3rd M-IBC2233 3 3 · D + D 2 ( 1 D ) 2 V S 1 = V o · ( 1 D ) 3 3 · D + D 2 ; V S 2 = V o 3 3 · D + D 2
PSOL1122 2 D 1 D V o 2 D
1st M-PSOL1225 2 1 D V in · ( 1 + D ) 1 D
2nd M-PSOL1234 3 D 1 D V in · ( 1 + D ) 1 D
3rd M-PSOL1234 2 D ( 1 D ) 2 V in ( 1 D ) 2
4th M-PSOL2233 2 D ( 1 D ) 2 V S 1 = V in 1 D ; V S 2 = V in ( 1 D ) 2
SEPIC1221 D 1 D V o D
1st M-SEPIC1232 1 + D 1 D V in 1 D
2nd M-SEPIC1244 2 + D 1 D V in 1 D
3rd M-SEPIC1335 1 + 2 · D 1 D V in · ( 1 + D ) 1 D
4th M-SEPIC1357 2 + 3 · D + D 2 1 D V o 2 + D
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Abbas, F.A.; Abdul-Jabbar, T.A.; Obed, A.A.; Kersten, A.; Kuder, M.; Weyh, T. A Comprehensive Review and Analytical Comparison of Non-Isolated DC-DC Converters for Fuel Cell Applications. Energies 2023, 16, 3493. https://doi.org/10.3390/en16083493

AMA Style

Abbas FA, Abdul-Jabbar TA, Obed AA, Kersten A, Kuder M, Weyh T. A Comprehensive Review and Analytical Comparison of Non-Isolated DC-DC Converters for Fuel Cell Applications. Energies. 2023; 16(8):3493. https://doi.org/10.3390/en16083493

Chicago/Turabian Style

Abbas, Furqan A., Thealfaqar A. Abdul-Jabbar, Adel A. Obed, Anton Kersten, Manuel Kuder, and Thomas Weyh. 2023. "A Comprehensive Review and Analytical Comparison of Non-Isolated DC-DC Converters for Fuel Cell Applications" Energies 16, no. 8: 3493. https://doi.org/10.3390/en16083493

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