# Demonstration of Three True Random Number Generator Circuits Using Memristor Created Entropy and Commercial Off-the-Shelf Components

^{*}

## Abstract

**:**

## 1. Introduction

## 2. Materials and Methods

#### 2.1. Electrical Components and Measurements

_{2}Se

_{3}between layers of Ge

_{2}Se

_{3}.

#### 2.2. Circuits Tested

#### 2.3. Jiang’s TRNG

_{2}-based diffusive memristor device. In Jiang’s design a pulse train is sent through a memristor that is placed in series with a resistor. Entropy is captured in the memristor device as a variability in the time it takes for the device to transition from a high resistance state to a low resistance state.

#### 2.3.1. Jiang’s Circuit Operation

_{ref}, the comparator output (Clk_en_) is high. When Clk_en_ signal is high the counter is disabled. In the opposite case when the memristor is in a low resistance state, the output of the circuit is higher than V

_{ref}and the Clk_en_ signal is low which enables the counter. This is a slight modification to Jiang’s original circuit which used an AND gate at the input of the counter to enable or disable the clock signal instead of the counter’s enable pin. The two circuits are functionally equivalent because the AND gate acts as an enable on the clock signal. If the enable input is a 0, then the output of the AND gate suppresses the clock and is always 0. If the enable input is a 1 then the output of the AND gate matches the input of the clock pin.

_{ref}the output of the comparator goes low. This enables the Clk_en_ on the counter, allowing it to count. At D, the pulse train voltage goes low, causing the Mem Out voltage to drop below V

_{ref}and disable the counter, holding the output value of the MSB. The random bit generated in this case is held at “1”. The memristor will also be reset from a high to low state during this time. At E the cycle restarts. At F the transition of the memristor from high to low resistance occurs earlier than the previous cycle. The Clk_en_ signal goes high at G and the counter is disabled, this time holding its output at a “0” because a different number of clock cycles were counted than in the previous pulse train window.

#### 2.3.2. Breadboard Implementation and Measurements of Jiang’s Circuit

_{ref}was generated using a potentiometer between the Digilent AD2 V+ power supply and V- power supply. This allowed the V

_{ref}voltage to be easily adjusted for varying pulse input voltage amplitudes. The least significant bit (LSB) output from the counter was sampled by a digital input on the AD2. Data was saved using a 20 kHz sample rate. A 22 kΩ resistor was used in series with the W-SDC memristor device, as seen in Figure 2a. The final binary output was post-processed using Von Neumann debiasing [9] and analyzed using the NIST STS application [28]. 100 samples of 1 million bits were tested. Elapsed time to collect these samples was approximately 40 h. Figure 4 shows an image of the breadboard implementation of Jiang’s TRNG circuit.

#### 2.4. Rai’s TRNG

_{2}memristor model described in [29]. Entropy is captured as the time that it takes for a conductive channel to form in the memristor device, or the time that it takes the device to transition from high resistance to low resistance.

#### 2.4.1. Rai’s Circuit Operation

_{first}output switches first the output is 0. If the D

_{second}output switches first, then the output is a 1.

#### 2.4.2. Breadboard Implementation and Measurements of Rai’s Circuit

_{ref}was generated by an analog output from the Digilent AD2. 100 samples of 1 million bits were tested. The lapsed time to collect this data was approximately 80 h.

#### 2.5. S-TRNG

#### 2.5.1. S-TRNG Circuit Operation

_{CC}) and the negative supply voltage (−V

_{CC}). When the output is at V

_{CC}, the voltage at the noninverting input is 1/2 V

_{CC}due to the voltage divider. The voltage at the inverting input will be charged from −1/2 V

_{CC}to 1/2 V

_{CC}. Once he inverting input reaches a voltage of 1/2V

_{CC}(the same voltage at the noninverting input), the output of the op-amp will switch to −V

_{CC}. The voltage at the noninverting input will switch to −1/2 V

_{CC}and the capacitor will begin discharging from a voltage of 1/2 V

_{CC}to a voltage of −1/2 V

_{CC}. Once a voltage of −1/2 V

_{CC}is reached at the inverting input, the cycle will start over again.

_{CC}to 1/2 V

_{CC}and then discharge back down to −1/2 V

_{CC}. The oscillation period of the multivibrator circuit can be derived for a generic memristor device with a high resistance of R

_{H}, a low resistance of R

_{L}and a time to switch of R

_{LH}by examining two time windows of operation. The first time window is the charging of the capacitor while the memristor is in a low resistance state until it switches to a high resistance state. This is modelled by Equation (1) to calculates V

_{LH}, the voltage at which the memristor device switches from a high resistance to low resistance state.

_{HLC}as the time from when the device switches low resistance to high resistance state until the capacitor is fully charged.

#### 2.5.2. Breadboard Implementation and Measurements of S-TRNG Circuit

## 3. Results

_{2}-based diffusive memristor device with >96%. The hardware implementation (second data column in Table 1) using the W-SDC memristor also shows all tests passing. In order to pass the frequency test during the W-SDC circuit implementation in our work it was necessary to apply debiasing to the output of the TRNG. Without debiasing Jiang’s TRNG circuit had a pass rate is 0% for the STS frequency test. Jiang’s circuit performed slightly worse in our implementation than in [1]. This could be due to a variety of factors, most likely the fact that a different type of memristor device was used for our testing.

_{2}model [29] are given in the third results column in Table 1. Only five NIST tests were simulated in Rai’s report. However, the hardware implementation of Rai’s TRNG using the W-SDC memristor (Table 1, fourth data column) shows that the Rai TRNG passes every NIST test with superior performance to any other TRNG tested in our study. However, without debiasing our hardware implementation of Rai’s TRNG has a pass rate of 0% for the STS frequency test, similarly to the result obtained for the Jiang circuit.

## 4. Discussion

## 5. Conclusions

## Supplementary Materials

## Author Contributions

## Funding

## Conflicts of Interest

## Appendix A

#### Appendix A.1. Frequency (Monobits) Test

#### Appendix A.2. Frequency Test Within a Block

#### Appendix A.3. Runs Test

#### Appendix A.4. Longest Runs Test

#### Appendix A.5. Binary Matrix Rank Test

#### Appendix A.6. Discrete Fourier Transform (Spectral) Test

#### Appendix A.7. Non-Overlapping Template Matching Test

#### Appendix A.8. Overlapping Template Matching Test

#### Appendix A.9. Maurer’s “Universal Statistical” Test

#### Appendix A.10. Linear Complexity Test

^{19937}-1.

#### Appendix A.11. Serial Test

#### Appendix A.12. Approximate Entropy Test

#### Appendix A.13. Cumulative Sums Test

#### Appendix A.14. Random Excursions Test

#### Appendix A.15. Random Excursions Variant Test

## References

- Jiang, H.; Belkin, D.; Savel’ev, S.E.; Lin, S.; Wang, Z.; Li, Y.; Joshi, S.; Midya, R.; Li, C.; Rao, M.; et al. A novel true random number generator based on a stochastic diffusive memristor. Nat. Commun.
**2017**, 8, 882. [Google Scholar] [CrossRef] [Green Version] - Rai, V.K.; Tripath, S.; Mathew, J. Memristor based random number generator: Architectures and evaluation. Procedia Comput. Sci.
**2017**, 125, 577–583. [Google Scholar] [CrossRef] - Bucci, M.; Germani, L.; Luzzi, R.; Trifiletti, A.; Varanonuovo, M. High-Speed Oscillator-Based Truly Random Number Source for Cryptographic Applications on a Smart Card IC. IEEE Trans. Comput.
**2003**, 52, 403–409. [Google Scholar] [CrossRef] - Yang, K.; Blaauw, D.; Sylvester, D. Hardware Designs for Security in Ultra-Low-Power IoT Systems: An Overview and Survey. IEEE Micron.
**2017**, 37, 72–89. [Google Scholar] [CrossRef] - Hashim, N.A.N.; Loong, J.T.H.; Ghazali, A.; Hamid, F.A. Memristor based ring oscillators true random number generator with different window functions for applications in cryptography. Indones. J. Electr. Eng. Comput. Sci.
**2019**, 14, 201–209. [Google Scholar] [CrossRef] - Taskiran, Z.G.C.; Taskiran, M.; Killioglu, M.; Kahraman, N.; Sedef, H. A novel memristive true random number generator design. Compel Int. J. Comput. Math. Electr. Electron. Eng.
**2019**, 39, 1931–1947. [Google Scholar] [CrossRef] - Sunar, B.; Martin, W.J.; Stinson, D.R. A Provably Secure True random number generator with built-in tolerance to active attacks. IEEE Trans. Comput.
**2007**, 56, 109–119. [Google Scholar] [CrossRef] - Kattis, R.S.; Kavasseri, R.G.; Sai, V. Pseudorandom bit generation using coupled congruential generators. IEEE Trans. Circuits Syst. II Express Briefs
**2010**, 57, 203–207. [Google Scholar] [CrossRef] - Von Neumann, J. Various techniques used in connection with random digits. In Monte Carlo Method; Householder, A.S., Forsythe, G.E., Germond, H.H., Eds.; US Government Printing Office: Washington, DC, USA, 1951; Volume 12, pp. 36–38. [Google Scholar]
- Generating Random Binary Data from Geiger Counters. Available online: http://www.ciphergoth.org/crypto/unbiasing/ (accessed on 31 January 2021).
- Linux Random: Random(3)—Linux Man Page. Available online: https://linux.die.net/man/3/randon (accessed on 31 January 2021).
- Linux Urandom: Urandom(4)—Linux Man Page. Available online: https://linux.die.net/man/4/urandom (accessed on 31 January 2021).
- Rakitin, V.V.; Rusakov, S.G. Memristor Based Pulse Train Generator. Russ. Microelectron.
**2019**, 48, 255–261. [Google Scholar] [CrossRef] - Robson, S. A Ring Oscillator Based Truly Random Number Generator. Master’s Thesis, University of Waterloo, Waterloo, ON, Canada, 2013. [Google Scholar]
- Singh, J.P.; Koley, J.; Akgul, A.; Gurevin, B.; Roy, B.K. A new chaotic oscillator containing generalized memristor, single op-amp and RLC with chaos suppression and an application for the random number generation. Eur. Phys. J.
**2019**, 228, 2233–2245. [Google Scholar] - Yadav, A. Design and Analysis of Digital True Random Number Generator. Master’s Thesis, Virginia Commonwealth University, Richmond, VA, USA, 2013. [Google Scholar]
- Intel
^{®}Digital Random Number Generator (DRNG) Software Implementation Guide. Available online: https://software.intel.com/content/www/us/en/develop/articles/intel-digital-random-number-generator-drng-software-implementation-guide.html (accessed on 31 January 2021). - Campbell, K.A. Self-Directed channel memristor for high temperature operation. Microelectron. J.
**2017**, 59, 10–14. [Google Scholar] [CrossRef] - Chua, L.O. The Fourth Element. Proc. IEEE
**2012**, 100, 1920–1927. [Google Scholar] [CrossRef] - Yang, Y.; Gao, P.; Li, L.; Pan, X.; Tappertzhofen, S.; Choi, S.; Waser, R.; Valov, I.; Lu, W.D. Electrochemical Dynamics of Nanoscale Metallic Inclusions in Dielectrics. Nat. Commun.
**2014**, 5, 4232. [Google Scholar] [CrossRef] [PubMed] [Green Version] - Rajendran, J.; Karri, R.; Wendt, J.B.; Potkonjak, M.; McDonald, N.; Rose, G.S.; Wysocki, B. Nano meets security: Exploring nanoelectronic devices for security applications. Proc. IEEE
**2015**, 103, 829–849. [Google Scholar] [CrossRef] - Chakraborty, S.; Garg, A.; Suri, M. True random number generation from commodity NVM chips. IEEE Trans. Elect. Dev.
**2020**, 67, 888–894. [Google Scholar] [CrossRef] - Kuka, C.S.; Hu, Y.; Xu, Q.; Alkahtani, M. An innovative near-field communication security based on the chaos generated by memristive circuits adopted as symmetrical key. IEEE Access
**2020**, 8, 167975–167984. [Google Scholar] [CrossRef] - Knowm: W+SDC Memristor 8 Discrrete 16 DIP. Available online: https://knowm.com/collections/frontpage/products/m-sdc-memristor-8-discrete-16-dip (accessed on 31 January 2021).
- Digikey Electronics. Available online: https://www.digikey.com/ (accessed on 31 January 2021).
- Bassham, L.E.; Rukhin, A.L.; Soto, J.; Nechvatal, J.R.; Smid, M.E.; Barker, E.B.; Leigh, S.D.; Levenson, M.; Vangel, M.; Banks, D.L.; et al. A statistical Test Suite for Random and Pseudorandom Number Generators for Cryptographic Applications; Special Publication 800-22, Revision 1a; National Institute of Standards and Technology: Gaithersburg, ML, USA, 2010.
- Digilent AD2: USB Oscilloscope and Logic Analyzer. Available online: https://store.digilentinc.com/analog-discovery-2-100msps-usb-oscilloscope-logic-analyzer-and-variable-power-supply/ (accessed on 31 January 2021).
- NIST SP 800-22: Documentation and Software. Available online: https://csrc.nist.gov/Projects/Random-Bit-Generation/Documentation-and-Software (accessed on 31 January 2021).
- Strukov, D.B.; Snider, G.S.; Steward, D.R.; Williams, R.S. The Missing Memristor Found. Nature
**2008**, 453, 80–83. [Google Scholar] [CrossRef] [PubMed]

**Figure 4.**Implementation of Jiang’s design on a breadboard. The circuit is connected to the Digilent AD2 on the right.

**Figure 5.**Breadboard implementation of Rai’s true random number generator circuit. The circuit is connected to the Digilent AD2 on the right.

**Figure 6.**Histograms of the entropy captured as a slow clock sampling a fast clock in a dual oscillator type random number generator used in the S-TRNG circuit. Top graph: with a memristor. Bottom graph: with only a resistor. A total of 6000 clock periods were sampled for each oscillator type.

**Figure 7.**Example clock periods for memristor-based and resistor-based oscillators (variability emphasized in this example).

**Figure 8.**(

**a**) Breadboard implementation; (

**b**) Printed circuit board (PCB) implementation of the S-TRNG circuit.

**Table 1.**Comparison of all TRNG measurement results for the 15 STS tests and additional sequence, debiasing and implementation comparison for each dataset. Pass rates are shown for each STS test. Bolded pass rates are considered failing (less than 96%).

NIST STS Test | Jiang TRNG (from [1]) | Jiang TRNG | Rai TRNG (from [2]) | Rai TRNG | S-TRNG |
---|---|---|---|---|---|

Frequency | 97% | 99% | 100% | 100% | 98% |

Block Frequency | 99% | 99% | - | 100% | 98% |

Cumulative Sums | 97% | 99% | 100% | 100% | 97% |

Runs | 99% | 98% | 100% | 100% | 82% |

Longest Run | 100% | 99% | - | 100% | 100% |

Rank | 100% | 96% | - | 100% | 98% |

FFT | 99% | 99% | 100% | 100% | 97% |

Non Overlapping Template | 98% | 99% | - | 99% | 99% |

Overlapping Template | 99% | 98% | - | 100% | 98% |

Universal | 100% | 99% | - | 100% | 100% |

Approximate Entropy | 99% | 99% | 100% | 100% | 94% |

Random Excursions | 98% | 98% | - | 96% | 98% |

Random Excursions Variant | 99% | 99% | - | 98% | 99% |

Serial | 100% | 99% | - | 96% | 98% |

Linear Complexity | 100% | 99% | - | 100% | 100% |

Sequence Length | 1,000,000 | 1,000,000 | 5000 | 1,000,000 | 1,000,000 |

Sequences Tested | 76 | 100 | 100 | 100 | 100 |

Debiasing applied | No | Yes | No | Yes | Yes |

Circuit Implementation | Hardware | Hardware | SPICE | Hardware | Hardware |

Memristor Device | Ag:SiO_{2} | W-SDC | Model for TiO_{2} [28] | W-SDC | W-SDC |

Publisher’s Note: MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affiliations. |

© 2021 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/).

## Share and Cite

**MDPI and ACS Style**

Stoller, S.; Campbell, K.A.
Demonstration of Three True Random Number Generator Circuits Using Memristor Created Entropy and Commercial Off-the-Shelf Components. *Entropy* **2021**, *23*, 371.
https://doi.org/10.3390/e23030371

**AMA Style**

Stoller S, Campbell KA.
Demonstration of Three True Random Number Generator Circuits Using Memristor Created Entropy and Commercial Off-the-Shelf Components. *Entropy*. 2021; 23(3):371.
https://doi.org/10.3390/e23030371

**Chicago/Turabian Style**

Stoller, Scott, and Kristy A. Campbell.
2021. "Demonstration of Three True Random Number Generator Circuits Using Memristor Created Entropy and Commercial Off-the-Shelf Components" *Entropy* 23, no. 3: 371.
https://doi.org/10.3390/e23030371